Simulation Results: spi_device

 
11/12/2025 16:10:21 sha: 9c781e9 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 83.97 %
  • code
  • 93.22 %
  • assert
  • 94.30 %
  • func
  • 64.38 %
  • line
  • 98.98 %
  • branch
  • 98.18 %
  • cond
  • 96.03 %
  • toggle
  • 83.54 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
96.15%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 34.410s 8404.283us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 0.800s 17.647us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 1.460s 223.009us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 18.220s 15008.680us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 6.480s 8412.663us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 1.490s 55.656us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 1.460s 223.009us 1 1 100.00
spi_device_csr_aliasing 6.480s 8412.663us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.710s 21.369us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.500s 88.875us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.760s 30.208us 1 1 100.00
mem_parity 0 1 0.00
spi_device_mem_parity 0.830s 13.190us 0 1 0.00
mem_cfg 0 1 0.00
spi_device_ram_cfg 0.740s 7.625us 0 1 0.00
tpm_read 1 1 100.00
spi_device_tpm_rw 1.740s 232.447us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 1.740s 232.447us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 3.990s 3120.555us 1 1 100.00
spi_device_tpm_sts_read 0.750s 204.051us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 7.640s 2711.867us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 4.900s 3347.821us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 8.450s 1450.184us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 8.450s 1450.184us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 4.440s 1350.657us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 4.440s 1350.657us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 4.440s 1350.657us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 4.440s 1350.657us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 4.440s 1350.657us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 4.850s 445.319us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 5.060s 908.777us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 5.060s 908.777us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 5.060s 908.777us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 4.580s 868.773us 1 1 100.00
spi_device_read_buffer_direct 3.470s 1614.303us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 5.060s 908.777us 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 0.680s 39.653us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 2.420s 214.416us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 2.420s 214.416us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 34.410s 8404.283us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 226.090s 69662.054us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 0.830s 114.978us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.650s 66.190us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.770s 50.501us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 3.650s 758.981us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 3.650s 758.981us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 0.800s 17.647us 1 1 100.00
spi_device_csr_rw 1.460s 223.009us 1 1 100.00
spi_device_csr_aliasing 6.480s 8412.663us 1 1 100.00
spi_device_same_csr_outstanding 1.380s 30.211us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 0.800s 17.647us 1 1 100.00
spi_device_csr_rw 1.460s 223.009us 1 1 100.00
spi_device_csr_aliasing 6.480s 8412.663us 1 1 100.00
spi_device_same_csr_outstanding 1.380s 30.211us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_tl_intg_err 4.730s 257.328us 1 1 100.00
spi_device_sec_cm 1.520s 395.799us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 4.730s 257.328us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 56.220s 13955.032us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
spi_device_mem_parity 67004275128049348139631633026638443499534383773539328161448377062753697641290 73
UVM_ERROR @ 9190333 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[4])
Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR @ 9190333 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
UVM_ERROR @ 9190333 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[900])
Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])
spi_device_ram_cfg 40354225556867590112678634823446062491691421607678218643764134685041133789819 73
UVM_ERROR @ 5121342 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x52ece [1010010111011001110] vs 0x0 [0])
UVM_ERROR @ 5131342 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa86de0 [101010000110110111100000] vs 0x0 [0])
UVM_ERROR @ 5183342 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd9baed [110110011011101011101101] vs 0x0 [0])
UVM_ERROR @ 5277342 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7a4878 [11110100100100001111000] vs 0x0 [0])
UVM_ERROR @ 5369342 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xe0fd58 [111000001111110101011000] vs 0x0 [0])