Simulation Results: csrng

 
15/12/2025 16:03:12 sha: fc10746 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.74 %
  • code
  • 92.25 %
  • assert
  • 92.79 %
  • func
  • 78.19 %
  • block
  • 96.91 %
  • line
  • 97.69 %
  • branch
  • 92.24 %
  • toggle
  • 93.37 %
  • FSM
  • 85.71 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
csrng_smoke 3.000s 41.137us 1 1 100.00
csr_hw_reset 1 1 100.00
csrng_csr_hw_reset 3.000s 36.241us 1 1 100.00
csr_rw 1 1 100.00
csrng_csr_rw 2.000s 127.757us 1 1 100.00
csr_bit_bash 1 1 100.00
csrng_csr_bit_bash 18.000s 710.880us 1 1 100.00
csr_aliasing 1 1 100.00
csrng_csr_aliasing 4.000s 151.621us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
csrng_csr_mem_rw_with_rand_reset 3.000s 41.496us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
csrng_csr_rw 2.000s 127.757us 1 1 100.00
csrng_csr_aliasing 4.000s 151.621us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
interrupts 1 1 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
alerts 1 1 100.00
csrng_alert 7.000s 348.314us 1 1 100.00
err 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
cmds 1 1 100.00
csrng_cmds 107.000s 9745.466us 1 1 100.00
life cycle 1 1 100.00
csrng_cmds 107.000s 9745.466us 1 1 100.00
stress_all 1 1 100.00
csrng_stress_all 30.000s 3177.569us 1 1 100.00
intr_test 1 1 100.00
csrng_intr_test 2.000s 30.449us 1 1 100.00
alert_test 1 1 100.00
csrng_alert_test 2.000s 14.062us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
csrng_tl_errors 8.000s 548.989us 1 1 100.00
tl_d_illegal_access 1 1 100.00
csrng_tl_errors 8.000s 548.989us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
csrng_csr_hw_reset 3.000s 36.241us 1 1 100.00
csrng_csr_rw 2.000s 127.757us 1 1 100.00
csrng_csr_aliasing 4.000s 151.621us 1 1 100.00
csrng_same_csr_outstanding 5.000s 385.107us 1 1 100.00
tl_d_partial_access 4 4 100.00
csrng_csr_hw_reset 3.000s 36.241us 1 1 100.00
csrng_csr_rw 2.000s 127.757us 1 1 100.00
csrng_csr_aliasing 4.000s 151.621us 1 1 100.00
csrng_same_csr_outstanding 5.000s 385.107us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
csrng_tl_intg_err 5.000s 255.171us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
csrng_regwen 2.000s 33.145us 1 1 100.00
csrng_csr_rw 2.000s 127.757us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
csrng_alert 7.000s 348.314us 1 1 100.00
sec_cm_intersig_mubi 1 1 100.00
csrng_stress_all 30.000s 3177.569us 1 1 100.00
sec_cm_main_sm_fsm_sparse 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_cmd_stage_fsm_sparse 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_ctr_drbg_fsm_sparse 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_ctr_drbg_ctr_redun 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_gen_cmd_ctr_redun 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_ctrl_mubi 1 1 100.00
csrng_alert 7.000s 348.314us 1 1 100.00
sec_cm_main_sm_ctr_local_esc 2 2 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
sec_cm_constants_lc_gated 1 1 100.00
csrng_stress_all 30.000s 3177.569us 1 1 100.00
sec_cm_sw_genbits_bus_consistency 1 1 100.00
csrng_alert 7.000s 348.314us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
csrng_tl_intg_err 5.000s 255.171us 1 1 100.00
sec_cm_aes_cipher_fsm_sparse 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_aes_cipher_fsm_redun 2 2 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
sec_cm_aes_cipher_ctrl_sparse 2 2 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
sec_cm_aes_cipher_fsm_local_esc 2 2 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
sec_cm_aes_cipher_ctr_redun 3 3 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
csrng_sec_cm 4.000s 85.604us 1 1 100.00
sec_cm_aes_cipher_data_reg_local_esc 2 2 100.00
csrng_intr 6.000s 98.393us 1 1 100.00
csrng_err 2.000s 20.284us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
csrng_stress_all_with_rand_reset 101.000s 2937.233us 1 1 100.00

Error Messages

   Test seed line log context