spi_device Simulation Results

Simulation Results: spi_device

15/12/2025 16:03:12 sha: fc10746 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.83 %

code
93.28 %

assert
94.43 %

func
69.79 %

line
99.05 %

branch
98.25 %

cond
96.21 %

toggle
83.54 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	13.800s	4227.245us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	0.950s	75.852us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.400s	41.994us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	26.370s	11748.821us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	15.190s	6021.062us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	2.960s	54.683us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.400s	41.994us	1	1	100.00
	spi_device_csr_aliasing	15.190s	6021.062us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.760s	16.086us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.850s	505.602us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.980s	16.279us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.760s	4.248us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.730s	5.175us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	0.850s	19.503us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	0.850s	19.503us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	5.970s	3193.235us	1	1	100.00
	spi_device_tpm_sts_read	0.920s	62.421us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	23.720s	24420.850us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	5.920s	4364.504us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	6.250s	1883.303us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	6.250s	1883.303us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	27.880s	5573.091us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	27.880s	5573.091us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	27.880s	5573.091us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	27.880s	5573.091us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	27.880s	5573.091us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	15.250s	40345.511us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	2.390s	202.093us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	2.390s	202.093us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	2.390s	202.093us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	3.880s	193.552us	1	1	100.00
	spi_device_read_buffer_direct	4.510s	2522.344us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	2.390s	202.093us	1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	0.900s	16.374us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	7.820s	1905.337us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	7.820s	1905.337us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	13.800s	4227.245us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	139.390s	25658.482us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	26.070s	2206.788us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.840s	37.828us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.730s	38.148us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	3.660s	1023.007us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	3.660s	1023.007us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	0.950s	75.852us	1	1	100.00
	spi_device_csr_rw	1.400s	41.994us	1	1	100.00
	spi_device_csr_aliasing	15.190s	6021.062us	1	1	100.00
	spi_device_same_csr_outstanding	2.340s	122.970us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	0.950s	75.852us	1	1	100.00
	spi_device_csr_rw	1.400s	41.994us	1	1	100.00
	spi_device_csr_aliasing	15.190s	6021.062us	1	1	100.00
	spi_device_same_csr_outstanding	2.340s	122.970us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	6.790s	294.139us	1	1	100.00
	spi_device_sec_cm	1.260s	154.389us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	6.790s	294.139us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	108.620s	11501.931us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	60314828896889340653589256747163462059357878407994956426241431547163514134774	73	UVM_ERROR @ 3527853 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[24]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 3527853 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 3527853 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[920]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	12753000250687069331693199676028756182702412007172648733470954076421599999377	73	UVM_ERROR @ 2663287 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x957234 [100101010111001000110100] vs 0x0 [0]) UVM_ERROR @ 2724287 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xb15b93 [101100010101101110010011] vs 0x0 [0]) UVM_ERROR @ 2802287 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xe1977c [111000011001011101111100] vs 0x0 [0]) UVM_ERROR @ 2852287 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xe6d343 [111001101101001101000011] vs 0x0 [0]) UVM_ERROR @ 2889287 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x52c1bc [10100101100000110111100] vs 0x0 [0])