Simulation Results: keymgr

 
16/12/2025 16:01:43 sha: de081ff json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.20 %
  • code
  • 94.29 %
  • assert
  • 97.49 %
  • func
  • 48.82 %
  • line
  • 98.66 %
  • branch
  • 97.58 %
  • cond
  • 93.76 %
  • toggle
  • 95.42 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.660s 98.257us 1 1 100.00
random 1 1 100.00
keymgr_random 21.770s 2800.782us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.880s 38.233us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 18.470s 4606.626us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.050s 66.202us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.030s 41.694us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
keymgr_csr_aliasing 3.050s 66.202us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.160s 77.278us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.490s 142.911us 1 1 100.00
keymgr_sideload_kmac 2.290s 95.159us 1 1 100.00
keymgr_sideload_aes 2.330s 956.445us 1 1 100.00
keymgr_sideload_otbn 1.870s 380.889us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 8.930s 2096.988us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.740s 210.335us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.270s 81.729us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.690s 250.712us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.840s 104.323us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.430s 273.942us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 1.690s 73.512us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.680s 40.585us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.810s 16.736us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.100s 383.606us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.100s 383.606us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.880s 38.233us 1 1 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
keymgr_csr_aliasing 3.050s 66.202us 1 1 100.00
keymgr_same_csr_outstanding 1.130s 93.870us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.880s 38.233us 1 1 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
keymgr_csr_aliasing 3.050s 66.202us 1 1 100.00
keymgr_same_csr_outstanding 1.130s 93.870us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 3.510s 597.115us 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.190s 146.742us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.190s 146.742us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.190s 146.742us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.190s 146.742us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 7.560s 2175.599us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.510s 597.115us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.190s 146.742us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.160s 77.278us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
keymgr_random 21.770s 2800.782us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
keymgr_random 21.770s 2800.782us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 1.070s 298.164us 1 1 100.00
keymgr_random 21.770s 2800.782us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.740s 210.335us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.840s 104.323us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.840s 104.323us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 21.770s 2800.782us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.600s 26.495us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.820s 59.348us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.740s 210.335us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.820s 59.348us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.820s 59.348us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.820s 59.348us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.460s 814.340us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.820s 59.348us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 8.860s 347.894us 1 1 100.00

Error Messages

   Test seed line log context