spi_device Simulation Results

Simulation Results: spi_device

17/12/2025 16:09:12 sha: e57c4e9 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
85.06 %

code
93.31 %

assert
94.30 %

func
67.56 %

line
99.11 %

branch
98.37 %

cond
96.18 %

toggle
83.54 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	10.200s	1156.870us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	1.330s	43.629us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.270s	32.816us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	9.860s	1897.744us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	5.060s	112.225us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	1.440s	93.558us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.270s	32.816us	1	1	100.00
	spi_device_csr_aliasing	5.060s	112.225us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.870s	54.911us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.460s	68.056us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.870s	14.797us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.690s	2.300us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.860s	5.728us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	1.050s	350.676us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	1.050s	350.676us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	4.400s	3840.448us	1	1	100.00
	spi_device_tpm_sts_read	1.000s	57.684us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	20.770s	3332.880us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	3.510s	228.683us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	1.730s	30.885us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	1.730s	30.885us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	3.090s	174.331us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	3.090s	174.331us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	3.090s	174.331us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	3.090s	174.331us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	3.090s	174.331us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	3.900s	395.842us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	44.730s	12452.941us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	44.730s	12452.941us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	44.730s	12452.941us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	16.490s	13230.929us	1	1	100.00
	spi_device_read_buffer_direct	2.770s	611.976us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	44.730s	12452.941us	1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	55.210s	36549.044us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	8.500s	4702.747us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	8.500s	4702.747us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	10.200s	1156.870us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	96.460s	103487.991us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	42.440s	3064.902us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.970s	13.817us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.790s	43.766us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	3.960s	181.889us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	3.960s	181.889us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	1.330s	43.629us	1	1	100.00
	spi_device_csr_rw	1.270s	32.816us	1	1	100.00
	spi_device_csr_aliasing	5.060s	112.225us	1	1	100.00
	spi_device_same_csr_outstanding	2.110s	146.094us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	1.330s	43.629us	1	1	100.00
	spi_device_csr_rw	1.270s	32.816us	1	1	100.00
	spi_device_csr_aliasing	5.060s	112.225us	1	1	100.00
	spi_device_same_csr_outstanding	2.110s	146.094us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	15.420s	3742.174us	1	1	100.00
	spi_device_sec_cm	1.600s	440.634us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	15.420s	3742.174us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	20.540s	1672.021us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	95594076445275936456633854488776524840787750642436805118669829544802457718705	73	UVM_ERROR @ 1860834 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[84]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 1860834 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 1860834 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[980]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	60179836371016001045780268772349882386876690512228159827025155823905760628139	73	UVM_ERROR @ 3386575 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xe4b33a [111001001011001100111010] vs 0x0 [0]) UVM_ERROR @ 3404575 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x2d3bf [101101001110111111] vs 0x0 [0]) UVM_ERROR @ 3408575 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x8bc0a5 [100010111100000010100101] vs 0x0 [0]) UVM_ERROR @ 3456575 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x41e8e2 [10000011110100011100010] vs 0x0 [0]) UVM_ERROR @ 3472575 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7d9dc7 [11111011001110111000111] vs 0x0 [0])