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(uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])":[{"name":"spi_device_mem_parity","qual_name":"0.spi_device_mem_parity.55913071566211560660134852258160366659284586100138488802171021527113742352490","seed":55913071566211560660134852258160366659284586100138488802171021527113742352490,"line":76,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2179577 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[56])\n"," Either the name is incorrect, or you may not have PLI/ACC visibility to that name\n","UVM_ERROR @   2179577 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","UVM_ERROR @   2179577 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[952])\n"," Either the name is incorrect, or you may not have PLI/ACC visibility to that name\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.5803733406625321555333342457633304915998322290191694465778759885610893710967","seed":5803733406625321555333342457633304915998322290191694465778759885610893710967,"line":76,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   1852675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x325b39 [1100100101101100111001] vs 0x0 [0]) \n","UVM_ERROR @   1876675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd13346 [110100010011001101000110] vs 0x0 [0]) \n","UVM_ERROR @   1916675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x755a91 [11101010101101010010001] vs 0x0 [0]) \n","UVM_ERROR @   1961675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x415d74 [10000010101110101110100] vs 0x0 [0]) \n","UVM_ERROR @   2042675 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x966d7d [100101100110110101111101] vs 0x0 [0]) \n"]}],"UVM_ERROR (spi_device_scoreboard.sv:2512) [scoreboard] Check failed item.d_data == `gmv(csr) (* [*] vs * [*]) CSR last_read_addr compare mismatch act * != exp *":[{"name":"spi_device_stress_all","qual_name":"0.spi_device_stress_all.52683104228403655935670049016238394313814546738191863516591555878428919190034","seed":52683104228403655935670049016238394313814546738191863516591555878428919190034,"line":112,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_stress_all/latest/run.log","log_context":["UVM_ERROR @ 97654844660 ps: (spi_device_scoreboard.sv:2512) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (10650624 [0xa28400] vs 0 [0x0]) CSR last_read_addr compare mismatch act 0xa28400 != exp 0x0\n","UVM_INFO @ 97654844660 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 5/8\n","UVM_INFO @ 97654844660 ps: (spi_device_flash_all_vseq.sv:51) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - running iteration 6/8\n","UVM_INFO @ 99685884660 ps: (spi_device_tpm_read_hw_reg_vseq.sv:48) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.tpm_vseq] starting sequence 5/9\n","UVM_INFO @ 105580844660 ps: (spi_device_flash_all_vseq.sv:72) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.spi_device_flash_and_tpm_vseq.flash_vseq] spi_device_env_pkg::\\spi_device_flash_all_vseq::main_seq .unnamed$$_0 - END:running iteration 6/8\n"]}]}},"passed":63,"total":66,"percent":95.45454545454545}