{"block":{"name":"uart","variant":null,"commit":"ee1b0f69521036a2461a922dedb3ef1c0fc7ad5f","commit_short":"ee1b0f6","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/ee1b0f69521036a2461a922dedb3ef1c0fc7ad5f","revision_info":"GitHub Revision: [`ee1b0f6`](https://github.com/lowrisc/opentitan/tree/ee1b0f69521036a2461a922dedb3ef1c0fc7ad5f)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-03-12T16:05:50Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/uart/data/uart_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"uart_smoke":{"max_time":1.23,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"uart_csr_hw_reset":{"max_time":0.72,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"uart_csr_rw":{"max_time":0.73,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"uart_csr_bit_bash":{"max_time":1.37,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"uart_csr_aliasing":{"max_time":1.03,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"uart_csr_mem_rw_with_rand_reset":{"max_time":0.8,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"uart_csr_rw":{"max_time":0.73,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":1.03,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"V2":{"testpoints":{"base_random_seq":{"tests":{"uart_tx_rx":{"max_time":45.51,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"parity":{"tests":{"uart_smoke":{"max_time":1.23,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_tx_rx":{"max_time":45.51,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"parity_error":{"tests":{"uart_intr":{"max_time":4.27,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_rx_parity_err":{"max_time":32.9,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"watermark":{"tests":{"uart_tx_rx":{"max_time":45.51,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_intr":{"max_time":4.27,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"fifo_full":{"tests":{"uart_fifo_full":{"max_time":47.77,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"fifo_overflow":{"tests":{"uart_fifo_overflow":{"max_time":91.57,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"fifo_reset":{"tests":{"uart_fifo_reset":{"max_time":24.77,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_frame_err":{"tests":{"uart_intr":{"max_time":4.27,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_break_err":{"tests":{"uart_intr":{"max_time":4.27,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_timeout":{"tests":{"uart_intr":{"max_time":4.27,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"perf":{"tests":{"uart_perf":{"max_time":100.32,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sys_loopback":{"tests":{"uart_loopback":{"max_time":3.54,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"line_loopback":{"tests":{"uart_loopback":{"max_time":3.54,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_noise_filter":{"tests":{"uart_noise_filter":{"max_time":8.04,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rx_start_bit_filter":{"tests":{"uart_rx_start_bit_filter":{"max_time":9.52,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tx_overide":{"tests":{"uart_tx_ovrd":{"max_time":13.12,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_oversample":{"tests":{"uart_rx_oversample":{"max_time":10.82,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"long_b2b_transfer":{"tests":{"uart_long_xfer_wo_dly":{"max_time":532.23,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"uart_stress_all":{"max_time":979.02,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"uart_alert_test":{"max_time":0.73,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"uart_intr_test":{"max_time":0.66,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"uart_tl_errors":{"max_time":1.53,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"uart_tl_errors":{"max_time":1.53,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.72,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.73,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":1.03,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.83,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.72,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.73,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":1.03,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.83,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":33,"total":34,"percent":97.05882352941177},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"uart_sec_cm":{"max_time":0.98,"sim_time":0.0,"passed":1,"total":1,"percent":100.0},"uart_tl_intg_err":{"max_time":1.29,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"uart_tl_intg_err":{"max_time":1.29,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"uart_stress_all_with_rand_reset":{"max_time":23.5,"sim_time":0.0,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"coverage":{"code":{"block":null,"line_statement":99.17,"branch":96.97,"condition_expression":95.1,"toggle":91.55,"fsm":null},"assertion":97.12,"functional":63.93},"cov_report_page":"/nightly/current_run/scratch/master/uart-sim-vcs/cov_report/dashboard.html","failed_jobs":{"buckets":{"UVM_ERROR (uart_scoreboard.sv:393) [scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (* [*] vs * [*]) check rx_idle fail: rx_en = *, uart_rx_clk_pulses = *":[{"name":"uart_noise_filter","qual_name":"0.uart_noise_filter.29422598887706587198620604737944710216206735120224783407393156588224948934479","seed":29422598887706587198620604737944710216206735120224783407393156588224948934479,"line":79,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_noise_filter/latest/run.log","log_context":["UVM_ERROR @ 10108745681 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 10108745681 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: uart_reg_block.status.rxidle reset value: 0x1 \n","UVM_ERROR @ 11154900577 ps: (uart_scoreboard.sv:377) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxempty, item.d_data) == rx_empty_exp (1 [0x1] vs 0 [0x0]) check rx_empty fail: uart_rx_clk_pulses = 0, rx_q.size = 1\n","UVM_ERROR @ 11154900577 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 11156043425 ps: (uart_scoreboard.sv:501) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] rxlvl mismatch exp: 1 (+/-1), act: 0,                                 clk_pulses: 0\n"]}]}},"passed":45,"total":46,"percent":97.82608695652173}