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[/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255\n"]},{"name":"i2c_target_intr_stress_wr","qual_name":"0.i2c_target_intr_stress_wr.87155819361339738046647756549043403046033934421392746393425746667332365063246","seed":87155819361339738046647756549043403046033934421392746393425746667332365063246,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_intr_stress_wr/latest/run.log","log_context":["Chronologic VCS simulator copyright 1991-2023\n","Contains Synopsys proprietary information.\n","Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64;  Mar 18 16:35 2026\n","Feature removed during lmreread, or wrong\n","SERVER line hostid.\n","Check your license file.\n","\n","Please contact VCS Customer Support at 1-800-VERILOG for more information.\n","\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 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255\n"]},{"name":"i2c","qual_name":"cov_merge","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/cov_merge/merged.vdb/cov_merge.log","log_context":["  LCA features enabled by '-lca' argument on the command line.  For more \n","  information regarding list of LCA features please refer to Chapter \"LCA \n","  features\" in the VCS Release Notes\n","\n","\n","Warning-[SPECIAL_LICENSE_NEEDED] Needs special license\n","  -merge_across_libs needs special license feature VCSTools_Net\n","  Please check if your license server has feature VCSTools_Net available\n","\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:110: cov_merge] Error 1\n"]}],"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_host_error_intr","qual_name":"0.i2c_host_error_intr.89000259209861235111298418692666897722426773311279669527455935936297914580059","seed":89000259209861235111298418692666897722426773311279669527455935936297914580059,"line":94,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log","log_context":["UVM_ERROR @  57615460 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between\n","UVM_INFO @  57615460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.79299452905857643840406247270548404337785611247348388902428176082014464866830","seed":79299452905857643840406247270548404337785611247348388902428176082014464866830,"line":95,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 14867629149 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between\n","UVM_INFO @ 14867629149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.36203317049708837384605494122563269823893577368944378448413943447803692179433","seed":36203317049708837384605494122563269823893577368944378448413943447803692179433,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log","log_context":["UVM_ERROR @ 1720725023 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between\n","UVM_INFO @ 1720725023 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.32782304046141932644473309889140854116502257053771043272228621910073446565181","seed":32782304046141932644473309889140854116502257053771043272228621910073446565181,"line":78,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_ERROR @  24864947 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 135 [0x87]) \n","UVM_INFO @  24864947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1236) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.69295116396347577016424294853617435491345723207699162446534109174190158149914","seed":69295116396347577016424294853617435491345723207699162446534109174190158149914,"line":95,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 1183845904 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses. \n","UVM_INFO @ 1183845904 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job killed most likely because its dependent job failed.":[{"name":"i2c_tl_errors","qual_name":"0.i2c_tl_errors.55677236481182032621306787193897143732198029554806710468775963168362145931121","seed":55677236481182032621306787193897143732198029554806710468775963168362145931121,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_tl_errors/latest/run.log","log_context":[]},{"name":"i2c_tl_intg_err","qual_name":"0.i2c_tl_intg_err.99747834615731804862910406173227510530845584973313615582542353140545855316021","seed":99747834615731804862910406173227510530845584973313615582542353140545855316021,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_tl_intg_err/latest/run.log","log_context":[]},{"name":"i2c_intr_test","qual_name":"0.i2c_intr_test.35826026262805480614367460447329550030060263598982799408984872827716699060902","seed":35826026262805480614367460447329550030060263598982799408984872827716699060902,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_intr_test/latest/run.log","log_context":[]},{"name":"i2c_csr_hw_reset","qual_name":"0.i2c_csr_hw_reset.32674399237742399169880225430294909187504310020730295887598013678870983991373","seed":32674399237742399169880225430294909187504310020730295887598013678870983991373,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_csr_hw_reset/latest/run.log","log_context":[]},{"name":"i2c_csr_rw","qual_name":"0.i2c_csr_rw.41264106200800438473755340404497957668876457632340030217193190443620310905423","seed":41264106200800438473755340404497957668876457632340030217193190443620310905423,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_csr_rw/latest/run.log","log_context":[]},{"name":"i2c_csr_bit_bash","qual_name":"0.i2c_csr_bit_bash.18284214538107185564397366282996320286382614180278804418871606213552268611885","seed":18284214538107185564397366282996320286382614180278804418871606213552268611885,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_csr_bit_bash/latest/run.log","log_context":[]},{"name":"i2c_csr_aliasing","qual_name":"0.i2c_csr_aliasing.72017735558037382963694658993032241901278694316435358656858756730381665220388","seed":72017735558037382963694658993032241901278694316435358656858756730381665220388,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_csr_aliasing/latest/run.log","log_context":[]},{"name":"i2c_same_csr_outstanding","qual_name":"0.i2c_same_csr_outstanding.87526767386254011239911062705217915777547010647987991424359892937859934906574","seed":87526767386254011239911062705217915777547010647987991424359892937859934906574,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_same_csr_outstanding/latest/run.log","log_context":[]},{"name":"i2c_csr_mem_rw_with_rand_reset","qual_name":"0.i2c_csr_mem_rw_with_rand_reset.94553000314267701315755883702330151851250279702336365179498361892007483473686","seed":94553000314267701315755883702330151851250279702336365179498361892007483473686,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_csr_mem_rw_with_rand_reset/latest/run.log","log_context":[]},{"name":"i2c","qual_name":"cov_report","seed":null,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/cov_report/cov_report.log","log_context":[]}]}},"passed":29,"total":64,"percent":45.3125}