{"block":{"name":"mbx","variant":null,"commit":"08f559e037721d6bccf5f4afd0ab3fb272ce2faf","commit_short":"08f559e","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/08f559e037721d6bccf5f4afd0ab3fb272ce2faf","revision_info":"GitHub Revision: [`08f559e`](https://github.com/lowrisc/opentitan/tree/08f559e037721d6bccf5f4afd0ab3fb272ce2faf)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-04-02T16:07:25Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/mbx/data/mbx_testplan.html","stages":{"V1":{"testpoints":{"mbx_smoke":{"tests":{"mbx_smoke":{"max_time":31.0,"sim_time":10090.372614,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"mbx_csr_hw_reset":{"max_time":1.0,"sim_time":43.596228,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"mbx_csr_rw":{"max_time":1.0,"sim_time":34.353859,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"mbx_csr_bit_bash":{"max_time":4.0,"sim_time":297.537413,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"mbx_csr_aliasing":{"max_time":2.0,"sim_time":28.582201,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"mbx_csr_mem_rw_with_rand_reset":{"max_time":1.0,"sim_time":20.806102,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"mbx_csr_rw":{"max_time":1.0,"sim_time":34.353859,"passed":1,"total":1,"percent":100.0},"mbx_csr_aliasing":{"max_time":2.0,"sim_time":28.582201,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":5,"total":6,"percent":83.33333333333333},"V2":{"testpoints":{"mbx_stress":{"tests":{"mbx_stress":{"max_time":2.0,"sim_time":148.965967,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"mbx_max_activity":{"tests":{"mbx_stress_zero_delays":{"max_time":51.0,"sim_time":5617.511616999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mbx_imbx_oob":{"tests":{"mbx_imbx_oob":{"max_time":9.0,"sim_time":462.75286700000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mbx_doe_intr_msg":{"tests":{"mbx_doe_intr_msg":{"max_time":15.0,"sim_time":611.308014,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"mbx_alert_test":{"max_time":1.0,"sim_time":55.907139,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"mbx_intr_test":{"max_time":1.0,"sim_time":22.456126,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"mbx_tl_errors":{"max_time":2.0,"sim_time":36.666214999999994,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_illegal_access":{"tests":{"mbx_tl_errors":{"max_time":2.0,"sim_time":36.666214999999994,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_outstanding_access":{"tests":{"mbx_csr_hw_reset":{"max_time":1.0,"sim_time":43.596228,"passed":1,"total":1,"percent":100.0},"mbx_csr_rw":{"max_time":1.0,"sim_time":34.353859,"passed":1,"total":1,"percent":100.0},"mbx_csr_aliasing":{"max_time":2.0,"sim_time":28.582201,"passed":1,"total":1,"percent":100.0},"mbx_same_csr_outstanding":{"max_time":1.0,"sim_time":42.163593,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"mbx_csr_hw_reset":{"max_time":1.0,"sim_time":43.596228,"passed":1,"total":1,"percent":100.0},"mbx_csr_rw":{"max_time":1.0,"sim_time":34.353859,"passed":1,"total":1,"percent":100.0},"mbx_csr_aliasing":{"max_time":2.0,"sim_time":28.582201,"passed":1,"total":1,"percent":100.0},"mbx_same_csr_outstanding":{"max_time":1.0,"sim_time":42.163593,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":9,"total":11,"percent":81.81818181818181},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"mbx_sec_cm":{"max_time":2.0,"sim_time":37.639295,"passed":1,"total":1,"percent":100.0},"mbx_tl_intg_err":{"max_time":2.0,"sim_time":295.52778600000005,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"coverage":{"code":{"block":95.99,"line_statement":95.47,"branch":89.37,"condition_expression":null,"toggle":85.96,"fsm":null},"assertion":96.96,"functional":77.24},"cov_report_page":"/nightly/current_run/scratch/master/mbx-sim-xcelium/cov_report/index.html","failed_jobs":{"buckets":{"UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register":[{"name":"mbx_stress","qual_name":"0.mbx_stress.87123576202354912330600151480368568798731737247518766474752909530173809952003","seed":87123576202354912330600151480368568798731737247518766474752909530173809952003,"line":116,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log","log_context":["UVM_ERROR @ 148965967 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register\n","UVM_INFO @ 148965967 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *).":[{"name":"mbx_tl_errors","qual_name":"0.mbx_tl_errors.3354907470095159475145683922404078274510856172188165171017308044091270596154","seed":3354907470095159475145683922404078274510856172188165171017308044091270596154,"line":85,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_tl_errors/latest/run.log","log_context":["UVM_ERROR @  36666215 ps: (cip_base_scoreboard.sv:582) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted 1, but saw 0).\n"," TL item was: req: (cip_tl_seq_item@18564) { a_addr: 'h12981cd0  a_data: 'h608fb6de  a_mask: 'hc  a_size: 'h2  a_param: 'h0  a_source: 'h34  a_opcode: 'h1  a_user: 'h24ad8  d_param: 'h0  d_source: 'h34  d_data: 'h0  d_size: 'h2  d_opcode: 'h0  d_error: 'h0  d_sink: 'h0  d_user: 'h1caa  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{\"Unsupported partial write\"}.\n","UVM_INFO @  36666215 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]},{"name":"mbx_csr_mem_rw_with_rand_reset","qual_name":"0.mbx_csr_mem_rw_with_rand_reset.46385555813715977262130259461363566663373794018532782057786997945211314556293","seed":46385555813715977262130259461363566663373794018532782057786997945211314556293,"line":86,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @  20806102 ps: (cip_base_scoreboard.sv:582) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted 1, but saw 0).\n"," TL item was: req: (cip_tl_seq_item@17476) { a_addr: 'h5fd16450  a_data: 'hbe99df2b  a_mask: 'he  a_size: 'h2  a_param: 'h0  a_source: 'h41  a_opcode: 'h1  a_user: 'h2436c  d_param: 'h0  d_source: 'h41  d_data: 'h0  d_size: 'h2  d_opcode: 'h0  d_error: 'h0  d_sink: 'h0  d_user: 'h1caa  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{\"Unsupported partial write\"}.\n","UVM_INFO @  20806102 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]}]}},"passed":13,"total":16,"percent":81.25}