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[`d2f24af`](https://github.com/lowrisc/opentitan/tree/d2f24af56cfaadfec57b2d4974f57aac27aac0fb)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-04-06T16:07:05Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/mbx/data/mbx_testplan.html","stages":{"V1":{"testpoints":{"mbx_smoke":{"tests":{"mbx_smoke":{"max_time":26.0,"sim_time":4134.5527999999995,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"mbx_csr_hw_reset":{"max_time":1.0,"sim_time":15.117325000000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"mbx_csr_rw":{"max_time":1.0,"sim_time":17.908541,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"mbx_csr_bit_bash":{"max_time":2.0,"sim_time":121.111296,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"mbx_csr_aliasing":{"max_time":1.0,"sim_time":21.099313,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"mbx_csr_mem_rw_with_rand_reset":{"max_time":1.0,"sim_time":6.25066,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"mbx_csr_rw":{"max_time":1.0,"sim_time":17.908541,"passed":1,"total":1,"percent":100.0},"mbx_csr_aliasing":{"max_time":1.0,"sim_time":21.099313,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":5,"total":6,"percent":83.33333333333333},"V2":{"testpoints":{"mbx_stress":{"tests":{"mbx_stress":{"max_time":2.0,"sim_time":139.88380600000002,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"mbx_max_activity":{"tests":{"mbx_stress_zero_delays":{"max_time":2.0,"sim_time":98.68388300000001,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"mbx_imbx_oob":{"tests":{"mbx_imbx_oob":{"max_time":33.0,"sim_time":6339.365536,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mbx_doe_intr_msg":{"tests":{"mbx_doe_intr_msg":{"max_time":15.0,"sim_time":551.071089,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"mbx_alert_test":{"max_time":1.0,"sim_time":14.616855,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"mbx_intr_test":{"max_time":2.0,"sim_time":40.334603,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"mbx_tl_errors":{"max_time":1.0,"sim_time":6.453963,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_illegal_access":{"tests":{"mbx_tl_errors":{"max_time":1.0,"sim_time":6.453963,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_outstanding_access":{"tests":{"mbx_csr_hw_reset":{"max_time":1.0,"sim_time":15.117325000000001,"passed":1,"total":1,"percent":100.0},"mbx_csr_rw":{"max_time":1.0,"sim_time":17.908541,"passed":1,"total":1,"percent":100.0},"mbx_csr_aliasing":{"max_time":1.0,"sim_time":21.099313,"passed":1,"total":1,"percent":100.0},"mbx_same_csr_outstanding":{"max_time":1.0,"sim_time":46.003544999999995,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"mbx_csr_hw_reset":{"max_time":1.0,"sim_time":15.117325000000001,"passed":1,"total":1,"percent":100.0},"mbx_csr_rw":{"max_time":1.0,"sim_time":17.908541,"passed":1,"total":1,"percent":100.0},"mbx_csr_aliasing":{"max_time":1.0,"sim_time":21.099313,"passed":1,"total":1,"percent":100.0},"mbx_same_csr_outstanding":{"max_time":1.0,"sim_time":46.003544999999995,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":8,"total":11,"percent":72.72727272727273},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"mbx_sec_cm":{"max_time":1.0,"sim_time":57.317303,"passed":1,"total":1,"percent":100.0},"mbx_tl_intg_err":{"max_time":2.0,"sim_time":309.045664,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"coverage":{"code":{"block":96.5,"line_statement":96.36,"branch":90.81,"condition_expression":null,"toggle":85.73,"fsm":null},"assertion":96.96,"functional":74.51},"cov_report_page":"/nightly/current_run/scratch/master/mbx-sim-xcelium/cov_report/index.html","failed_jobs":{"buckets":{"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/mbx-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_mbx_*/rtl/mbx_ombx.sv,287): Assertion ReadyAssertedWhenRead_A has failed":[{"name":"mbx_stress","qual_name":"0.mbx_stress.80970247630859089356793826204466766585739388168570253873595045512570835189812","seed":80970247630859089356793826204466766585739388168570253873595045512570835189812,"line":267,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log","log_context":["xmsim: *E,ASRTST (/nightly/current_run/scratch/master/mbx-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_mbx_0.1/rtl/mbx_ombx.sv,287): (time 139883806 PS) Assertion tb.dut.u_ombx.ReadyAssertedWhenRead_A has failed \n","UVM_ERROR @ 139883806 ps: (mbx_ombx.sv:287) [ASSERT FAILED] ReadyAssertedWhenRead_A\n","UVM_INFO @ 139883806 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register":[{"name":"mbx_stress_zero_delays","qual_name":"0.mbx_stress_zero_delays.18095206212281630231292842694895221809322383386293242669522093403318784698909","seed":18095206212281630231292842694895221809322383386293242669522093403318784698909,"line":89,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress_zero_delays/latest/run.log","log_context":["UVM_ERROR @  98683883 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register\n","UVM_INFO @  98683883 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *).":[{"name":"mbx_tl_errors","qual_name":"0.mbx_tl_errors.84525246451230804734696091727952347605323465335499518528474823235155091662951","seed":84525246451230804734696091727952347605323465335499518528474823235155091662951,"line":85,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_tl_errors/latest/run.log","log_context":["UVM_ERROR @   6453963 ps: (cip_base_scoreboard.sv:582) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted 1, but saw 0).\n"," TL item was: req: (cip_tl_seq_item@15764) { a_addr: 'hfce0e590  a_data: 'h1c5d11cf  a_mask: 'h2  a_size: 'h1  a_param: 'h0  a_source: 'hd9  a_opcode: 'h1  a_user: 'h27462  d_param: 'h0  d_source: 'hd9  d_data: 'h0  d_size: 'h1  d_opcode: 'h0  d_error: 'h0  d_sink: 'h0  d_user: 'h10aa  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{\"Unsupported partial write\"}.\n","UVM_INFO @   6453963 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]},{"name":"mbx_csr_mem_rw_with_rand_reset","qual_name":"0.mbx_csr_mem_rw_with_rand_reset.66502825353823403430628795420825517819123546737077464266469183440300183863988","seed":66502825353823403430628795420825517819123546737077464266469183440300183863988,"line":86,"log_path":"/nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @   6250660 ps: (cip_base_scoreboard.sv:582) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted 1, but saw 0).\n"," TL item was: req: (cip_tl_seq_item@16135) { a_addr: 'h144347d4  a_data: 'hbda149b2  a_mask: 'h2  a_size: 'h2  a_param: 'h0  a_source: 'hb0  a_opcode: 'h1  a_user: 'h274e1  d_param: 'h0  d_source: 'hb0  d_data: 'h0  d_size: 'h2  d_opcode: 'h0  d_error: 'h0  d_sink: 'h0  d_user: 'h1caa  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{\"Unsupported partial write\"}.\n","UVM_INFO @   6250660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]}]}},"passed":12,"total":16,"percent":75.0}