{"block":{"name":"sram_ctrl","variant":"main","commit":"ae672c65f22255851c1b45fde094ba1961b68c74","commit_short":"ae672c6","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/ae672c65f22255851c1b45fde094ba1961b68c74","revision_info":"GitHub Revision: [`ae672c6`](https://github.com/lowrisc/opentitan/tree/ae672c65f22255851c1b45fde094ba1961b68c74)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-04-07T16:08:41Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/sram_ctrl_main/data/sram_ctrl_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"sram_ctrl_smoke":{"max_time":8.0,"sim_time":2833.591457,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":17.008650000000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":14.650939000000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"sram_ctrl_csr_bit_bash":{"max_time":2.0,"sim_time":92.986583,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":31.549386,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"sram_ctrl_csr_mem_rw_with_rand_reset":{"max_time":2.0,"sim_time":712.817947,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":14.650939000000001,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":31.549386,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"mem_walk":{"tests":{"sram_ctrl_mem_walk":{"max_time":213.0,"sim_time":39083.296239,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_partial_access":{"tests":{"sram_ctrl_mem_partial_access":{"max_time":84.0,"sim_time":3293.369187,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"V2":{"testpoints":{"multiple_keys":{"tests":{"sram_ctrl_multiple_keys":{"max_time":925.0,"sim_time":16558.703970000002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_pipeline":{"tests":{"sram_ctrl_stress_pipeline":{"max_time":177.0,"sim_time":10256.997181,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"bijection":{"tests":{"sram_ctrl_bijection":{"max_time":2019.0,"sim_time":1045653.9841349999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"access_during_key_req":{"tests":{"sram_ctrl_access_during_key_req":{"max_time":547.0,"sim_time":18692.095234,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"lc_escalation":{"tests":{"sram_ctrl_lc_escalation":{"max_time":35.0,"sim_time":37737.418794,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"executable":{"tests":{"sram_ctrl_executable":{"max_time":263.0,"sim_time":30187.923758,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"partial_access":{"tests":{"sram_ctrl_partial_access":{"max_time":10.0,"sim_time":8527.234423,"passed":1,"total":1,"percent":100.0},"sram_ctrl_partial_access_b2b":{"max_time":304.0,"sim_time":22613.442117,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"max_throughput":{"tests":{"sram_ctrl_max_throughput":{"max_time":5.0,"sim_time":657.07316,"passed":0,"total":1,"percent":0.0},"sram_ctrl_throughput_w_partial_write":{"max_time":13.0,"sim_time":753.718801,"passed":1,"total":1,"percent":100.0},"sram_ctrl_throughput_w_readback":{"max_time":5.0,"sim_time":1352.445068,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":3,"percent":33.333333333333336},"regwen":{"tests":{"sram_ctrl_regwen":{"max_time":1136.0,"sim_time":63685.36817,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"ram_cfg":{"tests":{"sram_ctrl_ram_cfg":{"max_time":4.0,"sim_time":1412.926693,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"sram_ctrl_stress_all":{"max_time":4183.0,"sim_time":122574.524632,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"sram_ctrl_alert_test":{"max_time":1.0,"sim_time":13.149308999999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":3.0,"sim_time":427.572,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":3.0,"sim_time":427.572,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":17.008650000000003,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":14.650939000000001,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":31.549386,"passed":1,"total":1,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":1.0,"sim_time":73.677184,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":1.0,"sim_time":17.008650000000003,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":14.650939000000001,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":31.549386,"passed":1,"total":1,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":1.0,"sim_time":73.677184,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":18,"total":20,"percent":90.0},"V2S":{"testpoints":{"passthru_mem_tl_intg_err":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":37.0,"sim_time":117462.601886,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_intg_err":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":2.0,"sim_time":671.499997,"passed":1,"total":1,"percent":100.0},"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":5.526912,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"prim_count_check":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":5.526912,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_bus_integrity":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":2.0,"sim_time":671.499997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_ctrl_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":1136.0,"sim_time":63685.36817,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_readback_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":1136.0,"sim_time":63685.36817,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_exec_config_regwen":{"tests":{"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":14.650939000000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_exec_config_mubi":{"tests":{"sram_ctrl_executable":{"max_time":263.0,"sim_time":30187.923758,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_exec_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":263.0,"sim_time":30187.923758,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_lc_hw_debug_en_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":263.0,"sim_time":30187.923758,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_lc_escalate_en_intersig_mubi":{"tests":{"sram_ctrl_lc_escalation":{"max_time":35.0,"sim_time":37737.418794,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_prim_ram_ctrl_mubi":{"tests":{"sram_ctrl_mubi_enc_err":{"max_time":3.0,"sim_time":1342.082381,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_mem_integrity":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":37.0,"sim_time":117462.601886,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_mem_readback":{"tests":{"sram_ctrl_readback_err":{"max_time":6.0,"sim_time":695.856574,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_mem_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":8.0,"sim_time":2833.591457,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_addr_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":8.0,"sim_time":2833.591457,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_instr_bus_lc_gated":{"tests":{"sram_ctrl_executable":{"max_time":263.0,"sim_time":30187.923758,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_ram_tl_lc_gate_fsm_sparse":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":5.526912,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_key_global_esc":{"tests":{"sram_ctrl_lc_escalation":{"max_time":35.0,"sim_time":37737.418794,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_key_local_esc":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":5.526912,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_init_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":5.526912,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_scramble_key_sideload":{"tests":{"sram_ctrl_smoke":{"max_time":8.0,"sim_time":2833.591457,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_tlul_fifo_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":5.526912,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":9,"total":10,"percent":90.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"sram_ctrl_stress_all_with_rand_reset":{"max_time":9.0,"sim_time":1279.775307,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"coverage":{"code":{"block":93.9,"line_statement":94.8,"branch":88.85,"condition_expression":null,"toggle":81.3,"fsm":66.67},"assertion":95.64,"functional":94.2},"cov_report_page":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/cov_report/index.html","failed_jobs":{"buckets":{"UVM_FATAL (sram_ctrl_base_vseq.sv:329) [sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-*:*], *'b0}) <= *; mask dist {'* :/ * - partial_access_pct, [* : '* - *] :/ partial_access_pct};}) Randomization failed!":[{"name":"sram_ctrl_max_throughput","qual_name":"0.sram_ctrl_max_throughput.21443001027625384128056909893051742939881003078009490279791516717621166830664","seed":21443001027625384128056909893051742939881003078009490279791516717621166830664,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_FATAL @ 657073160 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 657073160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_readback","qual_name":"0.sram_ctrl_throughput_w_readback.5626114990054607670064671275934276755705819532635480699360672576765627940031","seed":5626114990054607670064671275934276755705819532635480699360672576765627940031,"line":102,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_FATAL @ 1352445068 ps: (sram_ctrl_base_vseq.sv:329) [uvm_test_top.env.virtual_sequencer.sram_ctrl_throughput_vseq] Check failed (std::randomize(mask) with {$countones(mask ^ {mask[bus_params_pkg::BUS_DBW-2:0], 1'b0}) <= 2;         mask dist {'1 :/ 100 - partial_access_pct,                    [0 : '1 - 1] :/ partial_access_pct};}) Randomization failed! \n","UVM_INFO @ 1352445068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: *":[{"name":"sram_ctrl_sec_cm","qual_name":"0.sram_ctrl_sec_cm.44726936989346206001073831334507479955262033186702130105024711718555930218365","seed":44726936989346206001073831334507479955262033186702130105024711718555930218365,"line":90,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_main-sim-xcelium/0.sram_ctrl_sec_cm/latest/run.log","log_context":["UVM_ERROR @   5526912 ps: (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: sram_ctrl_regs_reg_block.status.init_error reset value: 0x0 \n","UVM_INFO @   5526912 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":28,"total":31,"percent":90.3225806451613}