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otp_ctrl_core_reg_block.direct_access_rdata_*":[{"name":"otp_ctrl_check_fail","qual_name":"0.otp_ctrl_check_fail.93269115945933341599595132337318782561115780268193566589237888336602688641580","seed":93269115945933341599595132337318782561115780268193566589237888336602688641580,"line":1884,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_check_fail/latest/run.log","log_context":["UVM_INFO @ 120054261 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_*":[{"name":"otp_ctrl_macro_errs","qual_name":"0.otp_ctrl_macro_errs.2392501817757529000600390384260657383486887128227467232225683462001480692244","seed":2392501817757529000600390384260657383486887128227467232225683462001480692244,"line":6926,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_macro_errs/latest/run.log","log_context":["UVM_INFO @ 487051544 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_parallel_key_req","qual_name":"0.otp_ctrl_parallel_key_req.39581377885549087980769224055476056050429510218592772381411835185740185877802","seed":39581377885549087980769224055476056050429510218592772381411835185740185877802,"line":3114,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_parallel_key_req/latest/run.log","log_context":["UVM_INFO @ 108253508 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_test_access","qual_name":"0.otp_ctrl_test_access.114199794189821366963870343398319475335493456584516983133324908089297768352679","seed":114199794189821366963870343398319475335493456584516983133324908089297768352679,"line":3042,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_test_access/latest/run.log","log_context":["UVM_INFO @ 275543403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: *":[{"name":"otp_ctrl_regwen","qual_name":"0.otp_ctrl_regwen.60200361286595192814403479483351958337927678420200833107101591148550003051731","seed":60200361286595192814403479483351958337927678420200833107101591148550003051731,"line":1120,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_regwen/latest/run.log","log_context":["UVM_INFO @ 753110840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *":[{"name":"otp_ctrl_stress_all_with_rand_reset","qual_name":"0.otp_ctrl_stress_all_with_rand_reset.3555015444398488780369747045214570370896895977535855482297764805530721279582","seed":3555015444398488780369747045214570370896895977535855482297764805530721279582,"line":91,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  83253895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue":[{"name":"otp_ctrl_sec_cm","qual_name":"0.otp_ctrl_sec_cm.90962340752729435622071840452872530134258133161199913920858609997151837422498","seed":90962340752729435622071840452872530134258133161199913920858609997151837422498,"line":2468,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_sec_cm/latest/run.log","log_context":["UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":18,"total":30,"percent":60.0}