{"block":{"name":"clkmgr","variant":null,"commit":"96721aa315c2556b3f250065b863079fc0652689","commit_short":"96721aa","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/96721aa315c2556b3f250065b863079fc0652689","revision_info":"GitHub Revision: [`96721aa`](https://github.com/lowrisc/opentitan/tree/96721aa315c2556b3f250065b863079fc0652689)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-05-06T19:39:25Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_darjeeling/ip_autogen/clkmgr/data/clkmgr_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"clkmgr_smoke":{"max_time":0.94,"sim_time":19.028802,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"clkmgr_csr_hw_reset":{"max_time":0.77,"sim_time":14.378323,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_bit_bash":{"tests":{"clkmgr_csr_bit_bash":{"max_time":1.89,"sim_time":82.423925,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_aliasing":{"tests":{"clkmgr_csr_aliasing":{"max_time":1.74,"sim_time":91.509049,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_mem_rw_with_rand_reset":{"tests":{"clkmgr_csr_mem_rw_with_rand_reset":{"max_time":1.36,"sim_time":51.605535,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0},"clkmgr_csr_aliasing":{"max_time":1.74,"sim_time":91.509049,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0}},"passed":2,"total":6,"percent":33.333333333333336},"V2":{"testpoints":{"peri_enables":{"tests":{"clkmgr_peri":{"max_time":1.37,"sim_time":43.524275,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"trans_enables":{"tests":{"clkmgr_trans":{"max_time":1.71,"sim_time":59.838686,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"clk_status":{"tests":{"clkmgr_clk_status":{"max_time":1.42,"sim_time":103.214844,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"jitter":{"tests":{"clkmgr_smoke":{"max_time":0.94,"sim_time":19.028802,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"frequency":{"tests":{"clkmgr_frequency":{"max_time":0.96,"sim_time":6.263316,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"frequency_timeout":{"tests":{"clkmgr_frequency_timeout":{"max_time":0.93,"sim_time":6.138277,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"frequency_overflow":{"tests":{"clkmgr_frequency":{"max_time":0.96,"sim_time":6.263316,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"stress_all":{"tests":{"clkmgr_stress_all":{"max_time":0.8,"sim_time":4.8228599999999995,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"alert_test":{"tests":{"clkmgr_alert_test":{"max_time":0.79,"sim_time":19.469393,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"clkmgr_tl_errors":{"max_time":4.04,"sim_time":117.892417,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"clkmgr_tl_errors":{"max_time":4.04,"sim_time":117.892417,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"clkmgr_csr_hw_reset":{"max_time":0.77,"sim_time":14.378323,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0},"clkmgr_csr_aliasing":{"max_time":1.74,"sim_time":91.509049,"passed":0,"total":1,"percent":0.0},"clkmgr_same_csr_outstanding":{"max_time":1.14,"sim_time":14.135292999999999,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":4,"percent":25.0},"tl_d_partial_access":{"tests":{"clkmgr_csr_hw_reset":{"max_time":0.77,"sim_time":14.378323,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0},"clkmgr_csr_aliasing":{"max_time":1.74,"sim_time":91.509049,"passed":0,"total":1,"percent":0.0},"clkmgr_same_csr_outstanding":{"max_time":1.14,"sim_time":14.135292999999999,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":4,"percent":25.0}},"passed":7,"total":13,"percent":53.84615384615385},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"clkmgr_sec_cm":{"max_time":6.85,"sim_time":372.58398700000004,"passed":1,"total":1,"percent":100.0},"clkmgr_tl_intg_err":{"max_time":0.84,"sim_time":6.999222,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"shadow_reg_update_error":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":3.24,"sim_time":316.82569,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadow_reg_read_clear_staged_value":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":3.24,"sim_time":316.82569,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadow_reg_storage_error":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":3.24,"sim_time":316.82569,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadowed_reset_glitch":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":3.24,"sim_time":316.82569,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadow_reg_update_error_with_csr_rw":{"tests":{"clkmgr_shadow_reg_errors_with_csr_rw":{"max_time":1.16,"sim_time":34.04265,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_bus_integrity":{"tests":{"clkmgr_tl_intg_err":{"max_time":0.84,"sim_time":6.999222,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_meas_clk_bkgn_chk":{"tests":{"clkmgr_frequency":{"max_time":0.96,"sim_time":6.263316,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_timeout_clk_bkgn_chk":{"tests":{"clkmgr_frequency_timeout":{"max_time":0.93,"sim_time":6.138277,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_meas_config_shadow":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":3.24,"sim_time":316.82569,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_idle_intersig_mubi":{"tests":{"clkmgr_idle_intersig_mubi":{"max_time":1.38,"sim_time":39.220307999999996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_jitter_config_mubi":{"tests":{"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_idle_ctr_redun":{"tests":{"clkmgr_sec_cm":{"max_time":6.85,"sim_time":372.58398700000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_meas_config_regwen":{"tests":{"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_clk_ctrl_config_regwen":{"tests":{"clkmgr_csr_rw":{"max_time":0.92,"sim_time":12.20241,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"prim_count_check":{"tests":{"clkmgr_sec_cm":{"max_time":6.85,"sim_time":372.58398700000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":3,"total":8,"percent":37.5},"V3":{"testpoints":{"regwen":{"tests":{"clkmgr_regwen":{"max_time":0.87,"sim_time":4.980194,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"stress_all_with_rand_reset":{"tests":{"clkmgr_stress_all_with_rand_reset":{"max_time":0.98,"sim_time":11.691514,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":82.32,"branch":87.53,"condition_expression":79.79,"toggle":99.62,"fsm":0.0},"assertion":89.88,"functional":59.62},"cov_report_page":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected *b*, got *b*":[{"name":"clkmgr_frequency","qual_name":"0.clkmgr_frequency.7789420931945429917420259558968807507680704770236340574455438919969257855227","seed":7789420931945429917420259558968807507680704770236340574455438919969257855227,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_frequency/latest/run.log","log_context":["UVM_INFO @   6263316 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_stress_all_with_rand_reset","qual_name":"0.clkmgr_stress_all_with_rand_reset.7072856810919624752363221269436638395136521428030888645988718419382190060152","seed":7072856810919624752363221269436638395136521428030888645988718419382190060152,"line":80,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  11691514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected *b*, got *b*":[{"name":"clkmgr_frequency_timeout","qual_name":"0.clkmgr_frequency_timeout.89803134947787605404139747723403165437005224648092960279447563447625965640760","seed":89803134947787605404139747723403165437005224648092960279447563447625965640760,"line":78,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_frequency_timeout/latest/run.log","log_context":["UVM_INFO @   6138277 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_stress_all","qual_name":"0.clkmgr_stress_all.103117039116215220813416676872998789606903534803902949419729170808186633178549","seed":103117039116215220813416676872998789606903534803902949419729170808186633178549,"line":78,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_stress_all/latest/run.log","log_context":["UVM_INFO @   4822860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_en":[{"name":"clkmgr_regwen","qual_name":"0.clkmgr_regwen.71882670694493188482387751305681988425608050469944803378984341239728637188463","seed":71882670694493188482387751305681988425608050469944803378984341239728637188463,"line":74,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_regwen/latest/run.log","log_context":["UVM_INFO @   4980194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: *":[{"name":"clkmgr_shadow_reg_errors_with_csr_rw","qual_name":"0.clkmgr_shadow_reg_errors_with_csr_rw.31364358538053219213493225954953394433440015350816577794221784237153351281254","seed":31364358538053219213493225954953394433440015350816577794221784237153351281254,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_INFO @  34042650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_tl_intg_err","qual_name":"0.clkmgr_tl_intg_err.112079529960365390971393203714863931429862359508253849473120667985329772856977","seed":112079529960365390971393203714863931429862359508253849473120667985329772856977,"line":86,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_tl_intg_err/latest/run.log","log_context":["UVM_INFO @   6999222 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: *":[{"name":"clkmgr_csr_rw","qual_name":"0.clkmgr_csr_rw.108911032413209787073659375999805500971708518193071654156479727658472207704969","seed":108911032413209787073659375999805500971708518193071654156479727658472207704969,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_csr_rw/latest/run.log","log_context":["UVM_INFO @  12202410 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_csr_aliasing","qual_name":"0.clkmgr_csr_aliasing.15285892127432500250928098527152481773334883767389975538594524872337776523677","seed":15285892127432500250928098527152481773334883767389975538594524872337776523677,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_csr_aliasing/latest/run.log","log_context":["UVM_INFO @  91509049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_csr_mem_rw_with_rand_reset","qual_name":"0.clkmgr_csr_mem_rw_with_rand_reset.47930868812471700845401704983297227007694280615193949868127923210826484917268","seed":47930868812471700845401704983297227007694280615193949868127923210826484917268,"line":76,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  51605535 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * Wrote clkmgr_reg_block.measure_ctrl_regwen[*]: *":[{"name":"clkmgr_csr_bit_bash","qual_name":"0.clkmgr_csr_bit_bash.73762427068289950218730994916102522314580227275117205535852135219359236273609","seed":73762427068289950218730994916102522314580227275117205535852135219359236273609,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_csr_bit_bash/latest/run.log","log_context":["UVM_INFO @  82423925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:649) [clkmgr_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch":[{"name":"clkmgr_same_csr_outstanding","qual_name":"0.clkmgr_same_csr_outstanding.66689607995395849197647523641001524893294914785052867143390109258375379057305","seed":66689607995395849197647523641001524893294914785052867143390109258375379057305,"line":75,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_same_csr_outstanding/latest/run.log","log_context":["UVM_INFO @  14135293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":10,"total":22,"percent":45.45454545454545}