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resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.103065032226745508062969357181978575526584547046749358944892341023398318089989","seed":103065032226745508062969357181978575526584547046749358944892341023398318089989,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @    848851 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa9a71 [10101001101001110001] vs 0x0 [0]) \n","UVM_ERROR @    861851 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7ac594 [11110101100010110010100] vs 0x0 [0]) \n","UVM_ERROR @    948851 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa6cfb5 [101001101100111110110101] vs 0x0 [0]) \n","UVM_ERROR @    989851 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x77237f [11101110010001101111111] vs 0x0 [0]) \n"]}]}},"passed":31,"total":33,"percent":93.93939393939394}