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catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_stress_all","qual_name":"0.otp_ctrl_stress_all.23779816100872989464167767570457288040263976537372057917920892956584714507784","seed":23779816100872989464167767570457288040263976537372057917920892956584714507784,"line":6609,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all/latest/run.log","log_context":["UVM_INFO @ 775587264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:671) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr":[{"name":"otp_ctrl_dai_lock","qual_name":"0.otp_ctrl_dai_lock.25822073326930348509647646805635838789245644532632693991953252572700675135724","seed":25822073326930348509647646805635838789245644532632693991953252572700675135724,"line":9275,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_dai_lock/latest/run.log","log_context":["UVM_INFO @ 487187149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_parallel_key_req","qual_name":"0.otp_ctrl_parallel_key_req.13996735071469400311778501108925575208714983385102736385339325818852366995119","seed":13996735071469400311778501108925575208714983385102736385339325818852366995119,"line":5707,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_parallel_key_req/latest/run.log","log_context":["UVM_INFO @ 782017427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:1320) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_*":[{"name":"otp_ctrl_macro_errs","qual_name":"0.otp_ctrl_macro_errs.47705153587925172755349442413764730354000119993129224863494591564543068133683","seed":47705153587925172755349442413764730354000119993129224863494591564543068133683,"line":2808,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_macro_errs/latest/run.log","log_context":["UVM_INFO @ 1005257656 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:2213) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *":[{"name":"otp_ctrl_stress_all_with_rand_reset","qual_name":"0.otp_ctrl_stress_all_with_rand_reset.75509465767047142258115530668350232082534036161009811045071556679335731197241","seed":75509465767047142258115530668350232082534036161009811045071556679335731197241,"line":92,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  31469021 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *":[{"name":"otp_ctrl_csr_mem_rw_with_rand_reset","qual_name":"0.otp_ctrl_csr_mem_rw_with_rand_reset.85347661938219850490906176597961811474365230861919866079184144090248046167305","seed":85347661938219850490906176597961811474365230861919866079184144090248046167305,"line":91,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  62885460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":19,"total":30,"percent":63.333333333333336}