{"block":{"name":"dma","variant":null,"commit":"84f528505abe923cb404920e7bb0283ab6ff97ae","commit_short":"84f5285","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/84f528505abe923cb404920e7bb0283ab6ff97ae","revision_info":"GitHub Revision: [`84f5285`](https://github.com/lowrisc/opentitan/tree/84f528505abe923cb404920e7bb0283ab6ff97ae)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-07-14T19:40:28Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/dma/data/dma_testplan.html","stages":{"V1":{"testpoints":{"dma_memory_smoke":{"tests":{"dma_memory_smoke":{"max_time":4.0,"sim_time":1181.887106,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_handshake_smoke":{"tests":{"dma_handshake_smoke":{"max_time":4.0,"sim_time":1033.683375,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_generic_smoke":{"tests":{"dma_generic_smoke":{"max_time":5.0,"sim_time":340.949162,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"dma_csr_hw_reset":{"max_time":1.0,"sim_time":52.542515,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"dma_csr_rw":{"max_time":1.0,"sim_time":266.419958,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"dma_csr_bit_bash":{"max_time":9.0,"sim_time":976.2444790000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"dma_csr_aliasing":{"max_time":5.0,"sim_time":291.381349,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"dma_csr_mem_rw_with_rand_reset":{"max_time":1.0,"sim_time":49.448786,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"dma_csr_rw":{"max_time":1.0,"sim_time":266.419958,"passed":1,"total":1,"percent":100.0},"dma_csr_aliasing":{"max_time":5.0,"sim_time":291.381349,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"V2":{"testpoints":{"dma_memory_region_lock":{"tests":{"dma_memory_region_lock":{"max_time":82.0,"sim_time":9633.286334,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_memory_tl_error":{"tests":{"dma_memory_stress":{"max_time":171.0,"sim_time":37170.250189000006,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_handshake_tl_error":{"tests":{"dma_handshake_stress":{"max_time":1267.0,"sim_time":497209.45185799996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_handshake_stress":{"tests":{"dma_handshake_stress":{"max_time":1267.0,"sim_time":497209.45185799996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_memory_stress":{"tests":{"dma_memory_stress":{"max_time":171.0,"sim_time":37170.250189000006,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_generic_stress":{"tests":{"dma_generic_stress":{"max_time":190.0,"sim_time":19164.852469,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_handshake_mem_buffer_overflow":{"tests":{"dma_handshake_stress":{"max_time":1267.0,"sim_time":497209.45185799996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_abort":{"tests":{"dma_abort":{"max_time":6.0,"sim_time":1851.315717,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dma_stress_all":{"tests":{"dma_stress_all":{"max_time":95.0,"sim_time":32935.97135,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"dma_alert_test":{"max_time":2.0,"sim_time":18.478727,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"dma_intr_test":{"max_time":1.0,"sim_time":12.084517,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"dma_tl_errors":{"max_time":2.0,"sim_time":82.89945900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"dma_tl_errors":{"max_time":2.0,"sim_time":82.89945900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"dma_csr_hw_reset":{"max_time":1.0,"sim_time":52.542515,"passed":1,"total":1,"percent":100.0},"dma_csr_rw":{"max_time":1.0,"sim_time":266.419958,"passed":1,"total":1,"percent":100.0},"dma_csr_aliasing":{"max_time":5.0,"sim_time":291.381349,"passed":1,"total":1,"percent":100.0},"dma_same_csr_outstanding":{"max_time":2.0,"sim_time":144.978238,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"dma_csr_hw_reset":{"max_time":1.0,"sim_time":52.542515,"passed":1,"total":1,"percent":100.0},"dma_csr_rw":{"max_time":1.0,"sim_time":266.419958,"passed":1,"total":1,"percent":100.0},"dma_csr_aliasing":{"max_time":5.0,"sim_time":291.381349,"passed":1,"total":1,"percent":100.0},"dma_same_csr_outstanding":{"max_time":2.0,"sim_time":144.978238,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":13,"total":13,"percent":100.0},"V2S":{"testpoints":{"dma_illegal_addr_range":{"tests":{"dma_mem_enabled":{"max_time":22.0,"sim_time":395.63055599999996,"passed":1,"total":1,"percent":100.0},"dma_generic_stress":{"max_time":190.0,"sim_time":19164.852469,"passed":1,"total":1,"percent":100.0},"dma_handshake_stress":{"max_time":1267.0,"sim_time":497209.45185799996,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"dma_config_lock":{"tests":{"dma_config_lock":{"max_time":9.0,"sim_time":4003.00616,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_intg_err":{"tests":{"dma_tl_intg_err":{"max_time":2.0,"sim_time":432.056522,"passed":1,"total":1,"percent":100.0},"dma_sec_cm":{"max_time":1.0,"sim_time":14.576463,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":6,"total":6,"percent":100.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"dma_short_transfer":{"max_time":145.0,"sim_time":8961.57572,"passed":1,"total":1,"percent":100.0},"dma_longer_transfer":{"max_time":4.0,"sim_time":1312.262948,"passed":1,"total":1,"percent":100.0},"dma_stress_all_with_rand_reset":{"max_time":3.0,"sim_time":906.3756870000001,"passed":0,"total":1,"percent":0.0}},"passed":2,"total":3,"percent":66.66666666666667}},"passed":2,"total":3,"percent":66.66666666666667}},"coverage":{"code":{"block":97.38,"line_statement":96.89,"branch":95.83,"condition_expression":null,"toggle":77.37,"fsm":91.55},"assertion":96.08,"functional":64.29},"cov_report_page":"/nightly/current_run/scratch/master/dma-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR @ *ps: (cip_base_vseq.sv:1287) [dma_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"dma_stress_all_with_rand_reset","qual_name":"0.dma_stress_all_with_rand_reset.105684129174899847218456813728201143845965733615709169301208445044714125410425","seed":105684129174899847218456813728201143845965733615709169301208445044714125410425,"line":96,"log_path":"/nightly/current_run/scratch/master/dma-sim-xcelium/0.dma_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  906375687ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":24,"total":25,"percent":96.0}