{"block":{"name":"spi_device","variant":"1r1w","commit":"f3c026774a6ba616967ca35169575c4f24ec6211","commit_short":"f3c0267","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/f3c026774a6ba616967ca35169575c4f24ec6211","revision_info":"GitHub Revision: [`f3c0267`](https://github.com/lowrisc/opentitan/tree/f3c026774a6ba616967ca35169575c4f24ec6211)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-07-16T19:40:29Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/spi_device_1r1w/data/spi_device_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"spi_device_flash_and_tpm":{"max_time":283.0,"sim_time":31436.088815000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.0,"sim_time":20.854915000000002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"spi_device_csr_rw":{"max_time":3.0,"sim_time":98.683741,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"spi_device_csr_bit_bash":{"max_time":12.0,"sim_time":559.979493,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"spi_device_csr_aliasing":{"max_time":12.0,"sim_time":676.320762,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"spi_device_csr_mem_rw_with_rand_reset":{"max_time":2.0,"sim_time":54.128256,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"spi_device_csr_rw":{"max_time":3.0,"sim_time":98.683741,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":12.0,"sim_time":676.320762,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"mem_walk":{"tests":{"spi_device_mem_walk":{"max_time":2.0,"sim_time":20.204394,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_partial_access":{"tests":{"spi_device_mem_partial_access":{"max_time":3.0,"sim_time":30.808053,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"V2":{"testpoints":{"csb_read":{"tests":{"spi_device_csb_read":{"max_time":1.0,"sim_time":19.813755,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_parity":{"tests":{"spi_device_mem_parity":{"max_time":2.0,"sim_time":1.812054,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"mem_cfg":{"tests":{"spi_device_ram_cfg":{"max_time":1.0,"sim_time":3.3158510000000003,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tpm_read":{"tests":{"spi_device_tpm_rw":{"max_time":2.0,"sim_time":42.817389000000006,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_write":{"tests":{"spi_device_tpm_rw":{"max_time":2.0,"sim_time":42.817389000000006,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_hw_reg":{"tests":{"spi_device_tpm_read_hw_reg":{"max_time":11.0,"sim_time":1623.7136659999999,"passed":1,"total":1,"percent":100.0},"spi_device_tpm_sts_read":{"max_time":2.0,"sim_time":83.057585,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"tpm_fully_random_case":{"tests":{"spi_device_tpm_all":{"max_time":32.0,"sim_time":3201.724074,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"pass_cmd_filtering":{"tests":{"spi_device_pass_cmd_filtering":{"max_time":18.0,"sim_time":2441.911053,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"pass_addr_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":10.0,"sim_time":810.498065,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"pass_payload_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":10.0,"sim_time":810.498065,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_info_slots":{"tests":{"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"cmd_read_status":{"tests":{"spi_device_intercept":{"max_time":6.0,"sim_time":115.467798,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_jedec":{"tests":{"spi_device_intercept":{"max_time":6.0,"sim_time":115.467798,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_sfdp":{"tests":{"spi_device_intercept":{"max_time":6.0,"sim_time":115.467798,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_fast_read":{"tests":{"spi_device_intercept":{"max_time":6.0,"sim_time":115.467798,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_pipeline":{"tests":{"spi_device_intercept":{"max_time":6.0,"sim_time":115.467798,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"flash_cmd_upload":{"tests":{"spi_device_upload":{"max_time":68.0,"sim_time":12201.730574,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_command":{"tests":{"spi_device_mailbox":{"max_time":69.0,"sim_time":5442.602185,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_cross_outside_command":{"tests":{"spi_device_mailbox":{"max_time":69.0,"sim_time":5442.602185,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_cross_inside_command":{"tests":{"spi_device_mailbox":{"max_time":69.0,"sim_time":5442.602185,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"cmd_read_buffer":{"tests":{"spi_device_flash_mode":{"max_time":7.0,"sim_time":950.327072,"passed":1,"total":1,"percent":100.0},"spi_device_read_buffer_direct":{"max_time":10.0,"sim_time":1601.9212479999999,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_dummy_cycle":{"tests":{"spi_device_mailbox":{"max_time":69.0,"sim_time":5442.602185,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"quad_spi":{"tests":{"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dual_spi":{"tests":{"spi_device_flash_all":{"max_time":21.0,"sim_time":5309.547860000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"4b_3b_feature":{"tests":{"spi_device_cfg_cmd":{"max_time":3.0,"sim_time":101.620188,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"write_enable_disable":{"tests":{"spi_device_cfg_cmd":{"max_time":3.0,"sim_time":101.620188,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"flash_mode_ignore_cmds":{"tests":{"spi_device_flash_mode_ignore_cmds":{"max_time":64.0,"sim_time":5517.489954,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"TPM_with_flash_or_passthrough_mode":{"tests":{"spi_device_flash_and_tpm":{"max_time":283.0,"sim_time":31436.088815000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_and_flash_trans_with_min_inactive_time":{"tests":{"spi_device_flash_and_tpm_min_idle":{"max_time":37.0,"sim_time":1753.689081,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"spi_device_stress_all":{"max_time":84.0,"sim_time":4369.882094,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"spi_device_alert_test":{"max_time":2.0,"sim_time":14.352437,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"spi_device_intr_test":{"max_time":1.0,"sim_time":15.252355999999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"spi_device_tl_errors":{"max_time":3.0,"sim_time":34.946411999999995,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"spi_device_tl_errors":{"max_time":3.0,"sim_time":34.946411999999995,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.0,"sim_time":20.854915000000002,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":3.0,"sim_time":98.683741,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":12.0,"sim_time":676.320762,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":3.0,"sim_time":241.175768,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":1.0,"sim_time":20.854915000000002,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":3.0,"sim_time":98.683741,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":12.0,"sim_time":676.320762,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":3.0,"sim_time":241.175768,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":25,"total":27,"percent":92.5925925925926},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"spi_device_sec_cm":{"max_time":1.0,"sim_time":222.809325,"passed":1,"total":1,"percent":100.0},"spi_device_tl_intg_err":{"max_time":8.0,"sim_time":321.433281,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"spi_device_tl_intg_err":{"max_time":8.0,"sim_time":321.433281,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"coverage":{"code":{"block":98.3,"line_statement":98.72,"branch":96.92,"condition_expression":null,"toggle":72.75,"fsm":88.54},"assertion":95.4,"functional":66.03},"cov_report_page":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ1] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)":[{"name":"spi_device_mem_parity","qual_name":"0.spi_device_mem_parity.26933778605324778486651241015927179182380328049613704468216765542606708391202","seed":26933778605324778486651241015927179182380328049613704468216765542606708391202,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   1252054 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[951] not found within the scope .\n","UVM_ERROR @   1252054 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[951] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:28) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.75873591476695910198846186806888239243211302155029932250050459834778177379470","seed":75873591476695910198846186806888239243211302155029932250050459834778177379470,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @    883851 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x28b [1010001011] vs 0x0 [0]) \n","UVM_ERROR @    958851 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x86 [10000110] vs 0x0 [0]) \n","UVM_ERROR @   1049851 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x2f2 [1011110010] vs 0x0 [0]) \n","UVM_ERROR @   1126851 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xba [10111010] vs 0x0 [0]) \n"]}]}},"passed":31,"total":33,"percent":93.93939393939394}