{"block":{"name":"spi_device","variant":"1r1w","commit":"a22166c3c57d87a3cec488a8c6f8de1dba3dada7","commit_short":"a22166c","dirty":true,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/a22166c3c57d87a3cec488a8c6f8de1dba3dada7","revision_info":"GitHub Revision: [`a22166c`](https://github.com/lowrisc/opentitan/tree/a22166c3c57d87a3cec488a8c6f8de1dba3dada7)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-07-22T19:39:31Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/spi_device_1r1w/data/spi_device_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"spi_device_flash_and_tpm":{"max_time":267.0,"sim_time":87577.662641,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"spi_device_csr_hw_reset":{"max_time":2.0,"sim_time":304.684934,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"spi_device_csr_rw":{"max_time":2.0,"sim_time":140.069842,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"spi_device_csr_bit_bash":{"max_time":14.0,"sim_time":1014.5715470000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"spi_device_csr_aliasing":{"max_time":20.0,"sim_time":4226.800786000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"spi_device_csr_mem_rw_with_rand_reset":{"max_time":2.0,"sim_time":1536.0214569999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"spi_device_csr_rw":{"max_time":2.0,"sim_time":140.069842,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":20.0,"sim_time":4226.800786000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"mem_walk":{"tests":{"spi_device_mem_walk":{"max_time":2.0,"sim_time":13.693517,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_partial_access":{"tests":{"spi_device_mem_partial_access":{"max_time":2.0,"sim_time":262.11413699999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"V2":{"testpoints":{"csb_read":{"tests":{"spi_device_csb_read":{"max_time":2.0,"sim_time":20.359965,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_parity":{"tests":{"spi_device_mem_parity":{"max_time":2.0,"sim_time":2.9668330000000003,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"mem_cfg":{"tests":{"spi_device_ram_cfg":{"max_time":2.0,"sim_time":3.79915,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tpm_read":{"tests":{"spi_device_tpm_rw":{"max_time":2.0,"sim_time":59.956778,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_write":{"tests":{"spi_device_tpm_rw":{"max_time":2.0,"sim_time":59.956778,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_hw_reg":{"tests":{"spi_device_tpm_read_hw_reg":{"max_time":22.0,"sim_time":3259.3843650000003,"passed":1,"total":1,"percent":100.0},"spi_device_tpm_sts_read":{"max_time":2.0,"sim_time":32.866119,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"tpm_fully_random_case":{"tests":{"spi_device_tpm_all":{"max_time":46.0,"sim_time":18451.086805,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"pass_cmd_filtering":{"tests":{"spi_device_pass_cmd_filtering":{"max_time":5.0,"sim_time":9676.175103,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"pass_addr_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":35.0,"sim_time":5724.364066,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"pass_payload_translation":{"tests":{"spi_device_pass_addr_payload_swap":{"max_time":35.0,"sim_time":5724.364066,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_info_slots":{"tests":{"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"cmd_read_status":{"tests":{"spi_device_intercept":{"max_time":4.0,"sim_time":171.305253,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_jedec":{"tests":{"spi_device_intercept":{"max_time":4.0,"sim_time":171.305253,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_sfdp":{"tests":{"spi_device_intercept":{"max_time":4.0,"sim_time":171.305253,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_fast_read":{"tests":{"spi_device_intercept":{"max_time":4.0,"sim_time":171.305253,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_read_pipeline":{"tests":{"spi_device_intercept":{"max_time":4.0,"sim_time":171.305253,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"flash_cmd_upload":{"tests":{"spi_device_upload":{"max_time":13.0,"sim_time":1091.523013,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_command":{"tests":{"spi_device_mailbox":{"max_time":11.0,"sim_time":2248.634058,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_cross_outside_command":{"tests":{"spi_device_mailbox":{"max_time":11.0,"sim_time":2248.634058,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mailbox_cross_inside_command":{"tests":{"spi_device_mailbox":{"max_time":11.0,"sim_time":2248.634058,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"cmd_read_buffer":{"tests":{"spi_device_flash_mode":{"max_time":6.0,"sim_time":1910.606293,"passed":1,"total":1,"percent":100.0},"spi_device_read_buffer_direct":{"max_time":12.0,"sim_time":4955.929739,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"cmd_dummy_cycle":{"tests":{"spi_device_mailbox":{"max_time":11.0,"sim_time":2248.634058,"passed":1,"total":1,"percent":100.0},"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"quad_spi":{"tests":{"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"dual_spi":{"tests":{"spi_device_flash_all":{"max_time":33.0,"sim_time":8479.772907,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"4b_3b_feature":{"tests":{"spi_device_cfg_cmd":{"max_time":8.0,"sim_time":166.536375,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"write_enable_disable":{"tests":{"spi_device_cfg_cmd":{"max_time":8.0,"sim_time":166.536375,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"flash_mode_ignore_cmds":{"tests":{"spi_device_flash_mode_ignore_cmds":{"max_time":140.0,"sim_time":65608.88962300001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"TPM_with_flash_or_passthrough_mode":{"tests":{"spi_device_flash_and_tpm":{"max_time":267.0,"sim_time":87577.662641,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tpm_and_flash_trans_with_min_inactive_time":{"tests":{"spi_device_flash_and_tpm_min_idle":{"max_time":147.0,"sim_time":11007.554951,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"spi_device_stress_all":{"max_time":20.0,"sim_time":1060.8908689999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"spi_device_alert_test":{"max_time":2.0,"sim_time":40.641282,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"spi_device_intr_test":{"max_time":1.0,"sim_time":15.463951,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"spi_device_tl_errors":{"max_time":3.0,"sim_time":78.71779,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"spi_device_tl_errors":{"max_time":3.0,"sim_time":78.71779,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":2.0,"sim_time":304.684934,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":2.0,"sim_time":140.069842,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":20.0,"sim_time":4226.800786000001,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":3.0,"sim_time":139.726461,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"spi_device_csr_hw_reset":{"max_time":2.0,"sim_time":304.684934,"passed":1,"total":1,"percent":100.0},"spi_device_csr_rw":{"max_time":2.0,"sim_time":140.069842,"passed":1,"total":1,"percent":100.0},"spi_device_csr_aliasing":{"max_time":20.0,"sim_time":4226.800786000001,"passed":1,"total":1,"percent":100.0},"spi_device_same_csr_outstanding":{"max_time":3.0,"sim_time":139.726461,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":25,"total":27,"percent":92.5925925925926},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"spi_device_sec_cm":{"max_time":2.0,"sim_time":55.751289,"passed":1,"total":1,"percent":100.0},"spi_device_tl_intg_err":{"max_time":8.0,"sim_time":708.930819,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"spi_device_tl_intg_err":{"max_time":8.0,"sim_time":708.930819,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"coverage":{"code":{"block":98.32,"line_statement":98.75,"branch":96.95,"condition_expression":null,"toggle":72.75,"fsm":89.58},"assertion":95.4,"functional":67.89},"cov_report_page":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ1] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)":[{"name":"spi_device_mem_parity","qual_name":"0.spi_device_mem_parity.23409563908394705166721855720351134803014468611725053003838079379048787343452","seed":23409563908394705166721855720351134803014468611725053003838079379048787343452,"line":87,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_mem_parity/latest/run.log","log_context":["UVM_ERROR @   2339377 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))  \n","ERROR:          VHPI       NOTFOUND\n","         Name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[995] not found within the scope .\n","UVM_ERROR @   2339377 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ2] name tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[995] cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:28) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.96577378322978347091220337395469219510083300967346788028481028121398628587464","seed":96577378322978347091220337395469219510083300967346788028481028121398628587464,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   1167150 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x3d5 [1111010101] vs 0x0 [0]) \n","UVM_ERROR @   1242150 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x2d6 [1011010110] vs 0x0 [0]) \n","UVM_ERROR @   1320150 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x1f7 [111110111] vs 0x0 [0]) \n","UVM_ERROR @   1420150 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x3e [111110] vs 0x0 [0]) \n"]}]}},"passed":31,"total":33,"percent":93.93939393939394}