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---\n","\n","\n"]},{"name":"otp_ctrl_dai_lock","qual_name":"0.otp_ctrl_dai_lock.29255913248943581298014674751700546931473909044236557874233920836819813601523","seed":29255913248943581298014674751700546931473909044236557874233920836819813601523,"line":12525,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_dai_lock/latest/run.log","log_context":["UVM_INFO @ 19151076539 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:677) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr":[{"name":"otp_ctrl_check_fail","qual_name":"0.otp_ctrl_check_fail.630337921621985566380695306638409245159502073128039171684681569052290905266","seed":630337921621985566380695306638409245159502073128039171684681569052290905266,"line":7951,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_check_fail/latest/run.log","log_context":["UVM_INFO @ 813360636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_test_access","qual_name":"0.otp_ctrl_test_access.81918524760113235579316928705868739561923583778778913757780507763295849288966","seed":81918524760113235579316928705868739561923583778778913757780507763295849288966,"line":7602,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_test_access/latest/run.log","log_context":["UVM_INFO @ 1056350872 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:1326) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_*":[{"name":"otp_ctrl_macro_errs","qual_name":"0.otp_ctrl_macro_errs.89514578579322959406888656340464785119132460049706758292766581183100695934782","seed":89514578579322959406888656340464785119132460049706758292766581183100695934782,"line":11356,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_macro_errs/latest/run.log","log_context":["UVM_INFO @ 1464543944 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *":[{"name":"otp_ctrl_stress_all_with_rand_reset","qual_name":"0.otp_ctrl_stress_all_with_rand_reset.54858180300059630803282789778114574564414500110089433684322137970286153121215","seed":54858180300059630803282789778114574564414500110089433684322137970286153121215,"line":91,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 502082950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":20,"total":30,"percent":66.66666666666667}