{"block":{"name":"i2c","variant":null,"commit":"2695753ca0adf7d8748fa7a494d7aa5bb9972914","commit_short":"2695753","dirty":true,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/2695753ca0adf7d8748fa7a494d7aa5bb9972914","revision_info":"GitHub Revision: [`2695753`](https://github.com/lowrisc/opentitan/tree/2695753ca0adf7d8748fa7a494d7aa5bb9972914)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-07-30T19:40:39Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/i2c/data/i2c_testplan.html","stages":{"V1":{"testpoints":{"host_smoke":{"tests":{"i2c_host_smoke":{"max_time":300.0,"sim_time":6962.973798999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_smoke":{"tests":{"i2c_target_smoke":{"max_time":8.0,"sim_time":1760.394745,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"i2c_csr_hw_reset":{"max_time":2.0,"sim_time":21.20645,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"i2c_csr_rw":{"max_time":2.0,"sim_time":29.613004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"i2c_csr_bit_bash":{"max_time":3.0,"sim_time":914.831553,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"i2c_csr_aliasing":{"max_time":3.0,"sim_time":206.901871,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"i2c_csr_mem_rw_with_rand_reset":{"max_time":1.0,"sim_time":118.10972500000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"i2c_csr_rw":{"max_time":2.0,"sim_time":29.613004,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":3.0,"sim_time":206.901871,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":7,"total":7,"percent":100.0},"V2":{"testpoints":{"host_error_intr":{"tests":{"i2c_host_error_intr":{"max_time":2.0,"sim_time":26.624599999999997,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_stress_all":{"tests":{"i2c_host_stress_all":{"max_time":197.0,"sim_time":28491.866264,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_maxperf":{"tests":{"i2c_host_perf":{"max_time":39.0,"sim_time":4482.581978,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_override":{"tests":{"i2c_host_override":{"max_time":1.0,"sim_time":25.459701000000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_watermark":{"tests":{"i2c_host_fifo_watermark":{"max_time":1763.0,"sim_time":8204.322914,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_overflow":{"tests":{"i2c_host_fifo_overflow":{"max_time":1140.0,"sim_time":1985.6574950000002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_reset":{"tests":{"i2c_host_fifo_reset_fmt":{"max_time":2.0,"sim_time":435.130942,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_fmt_empty":{"max_time":22.0,"sim_time":301.090905,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_rx":{"max_time":7.0,"sim_time":206.267549,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_fifo_full":{"tests":{"i2c_host_fifo_full":{"max_time":628.0,"sim_time":3065.943518,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_timeout":{"tests":{"i2c_host_stretch_timeout":{"max_time":11.0,"sim_time":1247.035146,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"i2c_host_mode_toggle":{"tests":{"i2c_host_mode_toggle":{"max_time":1.0,"sim_time":45.516687,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_glitch":{"tests":{"i2c_target_glitch":{"max_time":5.0,"sim_time":443.427335,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all":{"tests":{"i2c_target_stress_all":{"max_time":3601.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_maxperf":{"tests":{"i2c_target_perf":{"max_time":4.0,"sim_time":2398.747656,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_empty":{"tests":{"i2c_target_stress_rd":{"max_time":9.0,"sim_time":644.524074,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_smoke":{"max_time":6.0,"sim_time":858.543461,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_reset":{"tests":{"i2c_target_fifo_reset_acq":{"max_time":2.0,"sim_time":412.386847,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_reset_tx":{"max_time":2.0,"sim_time":186.47241200000002,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_full":{"tests":{"i2c_target_stress_wr":{"max_time":3600.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"i2c_target_stress_rd":{"max_time":9.0,"sim_time":644.524074,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_stress_wr":{"max_time":605.0,"sim_time":4000.9706340000007,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":3,"percent":66.66666666666667},"target_timeout":{"tests":{"i2c_target_timeout":{"max_time":9.0,"sim_time":1203.337933,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_clock_stretch":{"tests":{"i2c_target_stretch":{"max_time":1653.0,"sim_time":3123.841062,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"bad_address":{"tests":{"i2c_target_bad_addr":{"max_time":5.0,"sim_time":1026.0197580000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_glitch":{"tests":{"i2c_target_hrst":{"max_time":15.0,"sim_time":10138.398643999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_fifo_watermark":{"tests":{"i2c_target_fifo_watermarks_acq":{"max_time":4.0,"sim_time":1334.275087,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_tx":{"max_time":3.0,"sim_time":134.112112,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_config_perf":{"tests":{"i2c_host_perf":{"max_time":39.0,"sim_time":4482.581978,"passed":1,"total":1,"percent":100.0},"i2c_host_perf_precise":{"max_time":4.0,"sim_time":103.470702,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_clock_stretching":{"tests":{"i2c_host_stretch_timeout":{"max_time":11.0,"sim_time":1247.035146,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_tx_stretch_ctrl":{"tests":{"i2c_target_tx_stretch_ctrl":{"max_time":5.0,"sim_time":292.088456,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_nack_generation":{"tests":{"i2c_target_nack_acqfull":{"max_time":4.0,"sim_time":2259.912818,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull_addr":{"max_time":5.0,"sim_time":2278.994429,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_txstretch":{"max_time":3.0,"sim_time":148.16199600000002,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_mode_halt_on_nak":{"tests":{"i2c_host_may_nack":{"max_time":3.0,"sim_time":3304.198606,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_smbus_maxlen":{"tests":{"i2c_target_smbus_maxlen":{"max_time":4.0,"sim_time":507.967729,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"i2c_alert_test":{"max_time":1.0,"sim_time":25.843563,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"i2c_intr_test":{"max_time":2.0,"sim_time":52.91725,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"i2c_tl_errors":{"max_time":3.0,"sim_time":332.345941,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"i2c_tl_errors":{"max_time":3.0,"sim_time":332.345941,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"i2c_csr_hw_reset":{"max_time":2.0,"sim_time":21.20645,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":2.0,"sim_time":29.613004,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":3.0,"sim_time":206.901871,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.0,"sim_time":37.125269,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"i2c_csr_hw_reset":{"max_time":2.0,"sim_time":21.20645,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":2.0,"sim_time":29.613004,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":3.0,"sim_time":206.901871,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.0,"sim_time":37.125269,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":34,"total":41,"percent":82.92682926829268},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"i2c_tl_intg_err":{"max_time":3.0,"sim_time":266.39208399999995,"passed":1,"total":1,"percent":100.0},"i2c_sec_cm":{"max_time":1.0,"sim_time":138.976568,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"i2c_tl_intg_err":{"max_time":3.0,"sim_time":266.39208399999995,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"host_stress_all_with_rand_reset":{"tests":{"i2c_host_stress_all_with_rand_reset":{"max_time":4.0,"sim_time":221.921362,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_error_intr":{"tests":{"i2c_target_unexp_stop":{"max_time":2.0,"sim_time":193.937224,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all_with_rand_reset":{"tests":{"i2c_target_stress_all_with_rand_reset":{"max_time":12.0,"sim_time":3508.1896749999996,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0}},"coverage":{"code":{"block":95.9,"line_statement":95.31,"branch":92.63,"condition_expression":null,"toggle":86.93,"fsm":82.01},"assertion":97.25,"functional":80.4},"cov_report_page":"/nightly/current_run/scratch/master/i2c-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_host_error_intr","qual_name":"0.i2c_host_error_intr.66374881802946412668875262295799037751767229149910331298103466902587153505466","seed":66374881802946412668875262295799037751767229149910331298103466902587153505466,"line":89,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_error_intr/latest/run.log","log_context":["UVM_INFO @  26624600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_host_stress_all","qual_name":"0.i2c_host_stress_all.67559248444969115740994409223655515905214830815117448384897620666010426505213","seed":67559248444969115740994409223655515905214830815117448384897620666010426505213,"line":135,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_stress_all/latest/run.log","log_context":["UVM_INFO @ 28491866264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.58125716509453362487235561355615829025482928527791289465619669528694414238130","seed":58125716509453362487235561355615829025482928527791289465619669528694414238130,"line":93,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_glitch/latest/run.log","log_context":["UVM_INFO @ 443427335 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job timed out after * minutes":[{"name":"i2c_target_stress_wr","qual_name":"0.i2c_target_stress_wr.15729804364521292766971224383017446987140154573171604973131501781149404660117","seed":15729804364521292766971224383017446987140154573171604973131501781149404660117,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_wr/latest/run.log","log_context":[]},{"name":"i2c_target_stress_all","qual_name":"0.i2c_target_stress_all.91227132030874483883820632564583697489127287527592038499852693221735683168906","seed":91227132030874483883820632564583697489127287527592038499852693221735683168906,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_all/latest/run.log","log_context":[]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/i2c-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_i2c_*/rtl/i2c_fifos.sv,320): Assertion TxWriteStableBeforeHandshake_A has failed (* cycles, starting * PS)":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.109637552210186680917312292607887574571805526537242062971730527360899900864969","seed":109637552210186680917312292607887574571805526537242062971730527360899900864969,"line":89,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_ERROR @ 193937224 ps: (i2c_fifos.sv:320) [ASSERT FAILED] TxWriteStableBeforeHandshake_A\n","UVM_INFO @ 193937224 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!":[{"name":"i2c_target_hrst","qual_name":"0.i2c_target_hrst.14690450427226244252565613503385253057112090652562993008141593423845379499234","seed":14690450427226244252565613503385253057112090652562993008141593423845379499234,"line":88,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_hrst/latest/run.log","log_context":["UVM_INFO @ 10138398644 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1287) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.113118841202120563339576210621915045851527499711506721751986034560759605655884","seed":113118841202120563339576210621915045851527499711506721751986034560759605655884,"line":94,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 221921362 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.9065595444067823940257182444188608344146814752358484487580270639148330852881","seed":9065595444067823940257182444188608344146814752358484487580270639148330852881,"line":130,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 3508189675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3)":[{"name":"i2c_host_mode_toggle","qual_name":"0.i2c_host_mode_toggle.48885698346701364936394407225910440849565431056770417907539026466010982647788","seed":48885698346701364936394407225910440849565431056770417907539026466010982647788,"line":88,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_mode_toggle/latest/run.log","log_context":["UVM_INFO @  45516687 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":40,"total":50,"percent":80.0}