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resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:28) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.12903162145188599934645725566831015091868261936440665632475360153578285042931","seed":12903162145188599934645725566831015091868261936440665632475360153578285042931,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   1224477 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x342 [1101000010] vs 0x0 [0]) \n","UVM_ERROR @   1261477 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x14e [101001110] vs 0x0 [0]) \n","UVM_ERROR @   1294477 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x2f2 [1011110010] vs 0x0 [0]) \n","UVM_ERROR @   1389477 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x12e [100101110] vs 0x0 [0]) \n"]}]}},"passed":31,"total":33,"percent":93.93939393939394}