{"block":{"name":"chip","variant":null,"commit":"93d21e75f0e212ac704e943a4a27f65f60b9922f","commit_short":"93d21e7","dirty":true,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/93d21e75f0e212ac704e943a4a27f65f60b9922f","revision_info":"GitHub Revision: [`93d21e7`](https://github.com/lowrisc/opentitan/tree/93d21e75f0e212ac704e943a4a27f65f60b9922f)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-08-31T21:27:41Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_darjeeling/data/chip_testplan.html","stages":{"V1":{"testpoints":{"chip_sw_uart_tx_rx":{"tests":{"chip_sw_uart_tx_rx":{"max_time":15.934817337431014,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_uart_rx_overflow":{"tests":{"chip_sw_uart_tx_rx":{"max_time":15.934817337431014,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_uart_rand_baudrate":{"tests":{"chip_sw_uart_rand_baudrate":{"max_time":37.46786834485829,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_uart_tx_rx_alt_clk_freq":{"tests":{"chip_sw_uart_tx_rx_alt_clk_freq":{"max_time":32.03755815047771,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_gpio_out":{"tests":{"chip_sw_gpio":{"max_time":453.24,"sim_time":288.565478,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_gpio_in":{"tests":{"chip_sw_gpio":{"max_time":453.24,"sim_time":288.565478,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_gpio_irq":{"tests":{"chip_sw_gpio":{"max_time":453.24,"sim_time":288.565478,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_example_tests":{"tests":{"chip_sw_example_rom":{"max_time":55.94,"sim_time":10.240001,"passed":0,"total":1,"percent":0.0},"chip_sw_example_manufacturer":{"max_time":19.38191236834973,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_example_concurrency":{"max_time":263.4,"sim_time":168.812,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_smoketest_signed":{"max_time":32.889939699321985,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":4,"percent":25.0},"csr_bit_bash":{"tests":{"chip_csr_bit_bash":{"max_time":10.92,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_aliasing":{"tests":{"chip_csr_aliasing":{"max_time":11.52,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"chip_csr_aliasing":{"max_time":11.52,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"xbar_smoke":{"tests":{"xbar_smoke":{"max_time":12.63,"sim_time":12.045572,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":3,"total":11,"percent":27.272727272727273},"V2":{"testpoints":{"chip_sw_spi_device_flash_mode":{"tests":{"chip_sw_uart_tx_rx_bootstrap":{"max_time":42.26784963067621,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_spi_device_pass_through":{"tests":{"chip_sw_spi_device_pass_through":{"max_time":2975.19,"sim_time":4390.849564,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_spi_device_pass_through_collision":{"tests":{"chip_sw_spi_device_pass_through_collision":{"max_time":410.36,"sim_time":273.046,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_spi_device_tpm":{"tests":{"chip_sw_spi_device_tpm":{"max_time":15.626136252656579,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_spi_host_tx_rx":{"tests":{"chip_sw_spi_host_tx_rx":{"max_time":13.029496628791094,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_i2c_host_tx_rx":{"tests":{"chip_sw_i2c_host_tx_rx":{"max_time":15.841951581649482,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_i2c_device_tx_rx":{"tests":{"chip_sw_i2c_device_tx_rx":{"max_time":19.840607130900025,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_pin_mux":{"tests":{"chip_padctrl_attributes":{"max_time":3.84,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_padctrl_attributes":{"tests":{"chip_padctrl_attributes":{"max_time":3.84,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_sleep_pin_wake":{"tests":{"chip_sw_sleep_pin_wake":{"max_time":13.435183210298419,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_sleep_pin_retention":{"tests":{"chip_sw_sleep_pin_retention":{"max_time":17.40433744713664,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_data_integrity":{"tests":{"chip_sw_data_integrity_escalation":{"max_time":13.702076086774468,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_instruction_integrity":{"tests":{"chip_sw_data_integrity_escalation":{"max_time":13.702076086774468,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_jtag_csr_rw":{"tests":{"chip_jtag_csr_rw":{"max_time":152.76,"sim_time":131.615,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_jtag_mem_access":{"tests":{"chip_jtag_mem_access":{"max_time":149.78,"sim_time":132.542,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_rv_dm_ndm_reset_req":{"tests":{"chip_rv_dm_ndm_reset_req":{"max_time":467.45,"sim_time":310.199,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rv_dm_ndm_reset_req_when_cpu_halted":{"tests":{"chip_sw_rv_dm_ndm_reset_req_when_cpu_halted":{"max_time":11.801147677004337,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_rv_dm_access_after_wakeup":{"tests":{"chip_sw_rv_dm_access_after_wakeup":{"max_time":16.04526129551232,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_rv_dm_lc_disabled":{"tests":{"chip_rv_dm_lc_disabled":{"max_time":418.87,"sim_time":504.759,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_timer":{"tests":{"chip_sw_rv_timer_irq":{"max_time":366.99,"sim_time":266.954,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_wakeup_irq":{"tests":{"chip_sw_aon_timer_irq":{"max_time":627.88,"sim_time":503.397,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_aon_timer_wdog_bark_irq":{"tests":{"chip_sw_aon_timer_irq":{"max_time":627.88,"sim_time":503.397,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_aon_timer_wdog_lc_escalate":{"tests":{"chip_sw_aon_timer_wdog_lc_escalate":{"max_time":596.87,"sim_time":386.525,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_wdog_bite_reset":{"tests":{"chip_sw_aon_timer_wdog_bite_reset":{"max_time":307.66,"sim_time":182.604,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_aon_timer_sleep_wdog_bite_reset":{"tests":{"chip_sw_aon_timer_wdog_bite_reset":{"max_time":307.66,"sim_time":182.604,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_aon_timer_sleep_wdog_sleep_pause":{"tests":{"chip_sw_aon_timer_sleep_wdog_sleep_pause":{"max_time":507.40000000000003,"sim_time":2310.451,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_plic_sw_irq":{"tests":{"chip_sw_plic_sw_irq":{"max_time":265.74,"sim_time":164.357,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_idle_trans":{"tests":{"chip_sw_otbn_randomness":{"max_time":473.61,"sim_time":245.135,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_idle":{"max_time":274.21,"sim_time":165.843,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc_idle":{"max_time":293.68,"sim_time":178.201,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_idle":{"max_time":257.93,"sim_time":164.067,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"chip_sw_clkmgr_off_trans":{"tests":{"chip_sw_clkmgr_off_aes_trans":{"max_time":287.22,"sim_time":185.28,"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_off_hmac_trans":{"max_time":327.15,"sim_time":185.28,"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_off_kmac_trans":{"max_time":298.17,"sim_time":185.392,"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_off_otbn_trans":{"max_time":276.95,"sim_time":185.36,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":4,"percent":0.0},"chip_sw_clkmgr_jitter":{"tests":{"chip_sw_otbn_ecdsa_op_irq_jitter_en":{"max_time":53.88,"sim_time":10.380001,"passed":0,"total":1,"percent":0.0},"chip_sw_aes_enc_jitter_en":{"max_time":56.34,"sim_time":10.400001,"passed":0,"total":1,"percent":0.0},"chip_sw_hmac_enc_jitter_en":{"max_time":61.589999999999996,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0},"chip_sw_kmac_mode_kmac_jitter_en":{"max_time":66.58,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0},"chip_sw_sram_ctrl_scrambled_access_jitter_en":{"max_time":13.181643688119948,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_jitter":{"max_time":281.19,"sim_time":161.261,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":6,"percent":16.666666666666668},"chip_sw_clkmgr_extended_range":{"tests":{"chip_sw_clkmgr_jitter_reduced_freq":{"max_time":544.78,"sim_time":1962.669484,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq":{"max_time":52.04,"sim_time":10.380001,"passed":0,"total":1,"percent":0.0},"chip_sw_aes_enc_jitter_en_reduced_freq":{"max_time":53.68,"sim_time":10.140001,"passed":0,"total":1,"percent":0.0},"chip_sw_hmac_enc_jitter_en_reduced_freq":{"max_time":67.68,"sim_time":10.320001,"passed":0,"total":1,"percent":0.0},"chip_sw_kmac_mode_kmac_jitter_en_reduced_freq":{"max_time":63.41,"sim_time":10.140001,"passed":0,"total":1,"percent":0.0},"chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq":{"max_time":56.1,"sim_time":10.180001,"passed":0,"total":1,"percent":0.0},"chip_sw_csrng_edn_concurrency_reduced_freq":{"max_time":51.31,"sim_time":10.320001,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":7,"percent":14.285714285714286},"chip_sw_clkmgr_deep_sleep_frequency":{"tests":{"chip_sw_ast_clk_outputs":{"max_time":71.12470400054008,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_sleep_frequency":{"tests":{"chip_sw_clkmgr_sleep_frequency":{"max_time":13.795956035144627,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_reset_frequency":{"tests":{"chip_sw_clkmgr_reset_frequency":{"max_time":12.574893429875374,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_escalation_reset":{"tests":{"chip_sw_all_escalation_resets":{"max_time":1393.49,"sim_time":943.433,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_external_full_reset":{"tests":{"chip_sw_pwrmgr_full_aon_reset":{"max_time":530.71,"sim_time":499.712,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_sleep_all_reset_reqs":{"tests":{"chip_sw_aon_timer_wdog_bite_reset":{"max_time":307.66,"sim_time":182.604,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_wdog_reset":{"tests":{"chip_sw_pwrmgr_wdog_reset":{"max_time":13.908989462070167,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_power_glitch_reset":{"tests":{"chip_sw_pwrmgr_full_aon_reset":{"max_time":530.71,"sim_time":499.712,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_pwrmgr_main_power_glitch_reset":{"tests":{"chip_sw_pwrmgr_main_power_glitch_reset":{"max_time":18.536681013181806,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_random_sleep_power_glitch_reset":{"tests":{"chip_sw_pwrmgr_random_sleep_power_glitch_reset":{"max_time":20.02268987149,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_deep_sleep_power_glitch_reset":{"tests":{"chip_sw_pwrmgr_deep_sleep_power_glitch_reset":{"max_time":13.456264206208289,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_sleep_power_glitch_reset":{"tests":{"chip_sw_pwrmgr_sleep_power_glitch_reset":{"max_time":14.98176895827055,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_sleep_disabled":{"tests":{"chip_sw_pwrmgr_sleep_disabled":{"max_time":17.729631419293582,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_pwrmgr_escalation_reset":{"tests":{"chip_sw_all_escalation_resets":{"max_time":1393.49,"sim_time":943.433,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_rstmgr_sys_reset_info":{"tests":{"chip_rv_dm_ndm_reset_req":{"max_time":467.45,"sim_time":310.199,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_cpu_info":{"tests":{"chip_sw_rstmgr_cpu_info":{"max_time":570.14,"sim_time":412.096,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_rstmgr_sw_req_reset":{"tests":{"chip_sw_rstmgr_sw_req":{"max_time":464.89,"sim_time":305.44,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_alert_info":{"tests":{"chip_sw_rstmgr_alert_info":{"max_time":537.1,"sim_time":331.228,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_rstmgr_sw_rst":{"tests":{"chip_sw_rstmgr_sw_rst":{"max_time":259.51,"sim_time":163.76,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_escalation_reset":{"tests":{"chip_sw_all_escalation_resets":{"max_time":1393.49,"sim_time":943.433,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_alerts":{"tests":{"chip_sw_alert_test":{"max_time":28.10100200306624,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_escalations":{"tests":{"chip_sw_alert_handler_escalation":{"max_time":23.71628371439874,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_all_escalation_resets":{"tests":{"chip_sw_all_escalation_resets":{"max_time":1393.49,"sim_time":943.433,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_entropy":{"tests":{"chip_sw_alert_handler_entropy":{"max_time":69.73207222670317,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_crashdump":{"tests":{"chip_sw_rstmgr_alert_info":{"max_time":537.1,"sim_time":331.228,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_ping_timeout":{"tests":{"chip_sw_alert_handler_ping_timeout":{"max_time":417.95,"sim_time":329.571,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_alert_handler_lpg_sleep_mode_alerts":{"tests":{"chip_sw_alert_handler_lpg_sleep_mode_alerts":{"max_time":89.28299480769783,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_lpg_sleep_mode_pings":{"tests":{"chip_sw_alert_handler_lpg_sleep_mode_pings":{"max_time":116.4691375978291,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_lpg_clock_off":{"tests":{"chip_sw_alert_handler_lpg_clkoff":{"max_time":99.64593936316669,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_lpg_reset_toggle":{"tests":{"chip_sw_alert_handler_lpg_reset_toggle":{"max_time":103.13351749442518,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_alert_handler_reverse_ping_in_deep_sleep":{"tests":{"chip_sw_alert_handler_reverse_ping_in_deep_sleep":{"max_time":96.2846756791696,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_alert_handler_escalation":{"tests":{"chip_sw_alert_handler_escalation":{"max_time":23.71628371439874,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_jtag_access":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_otp_hw_cfg":{"tests":{"chip_sw_lc_ctrl_otp_hw_cfg":{"max_time":11.793779228813946,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_init":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_transitions":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_kmac_req":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_broadcast":{"tests":{"chip_sw_otp_ctrl_lc_signals_test_unlocked0":{"max_time":13.35982763580978,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals_dev":{"max_time":19.465911949053407,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals_prod":{"max_time":20.569530294276774,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals_rma":{"max_time":13.05564256105572,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_rom_ctrl_integrity_check":{"max_time":1157.19,"sim_time":1294.046722,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_execution_main":{"max_time":13.6103910561651,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_prim_tl_access":{"max_time":545.48,"sim_time":625.03,"passed":1,"total":1,"percent":100.0},"chip_rv_dm_lc_disabled":{"max_time":418.87,"sim_time":504.759,"passed":0,"total":1,"percent":0.0}},"passed":2,"total":9,"percent":22.22222222222222},"chip_sw_aes_enc":{"tests":{"chip_sw_aes_enc":{"max_time":276.72,"sim_time":173.241,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_enc_jitter_en":{"max_time":56.34,"sim_time":10.400001,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"chip_sw_aes_gcm":{"tests":{"chip_sw_aes_enc":{"max_time":276.72,"sim_time":173.241,"passed":1,"total":1,"percent":100.0},"chip_sw_aes_enc_jitter_en":{"max_time":56.34,"sim_time":10.400001,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"chip_sw_aes_entropy":{"tests":{"chip_sw_aes_entropy":{"max_time":277.31,"sim_time":164.528,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_aes_idle":{"tests":{"chip_sw_aes_idle":{"max_time":274.21,"sim_time":165.843,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc":{"tests":{"chip_sw_hmac_enc":{"max_time":295.5,"sim_time":173.782,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_enc_jitter_en":{"max_time":61.589999999999996,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"chip_sw_hmac_idle":{"tests":{"chip_sw_hmac_enc_idle":{"max_time":293.68,"sim_time":178.201,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_enc":{"tests":{"chip_sw_kmac_mode_cshake":{"max_time":276.18,"sim_time":167.334,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_mode_kmac":{"max_time":303.58,"sim_time":188.892,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_mode_kmac_jitter_en":{"max_time":66.58,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0}},"passed":2,"total":3,"percent":66.66666666666667},"chip_sw_kmac_app_lc":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_kmac_app_rom":{"tests":{"chip_sw_kmac_app_rom":{"max_time":23.525084781460464,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_kmac_entropy":{"tests":{"chip_sw_kmac_entropy":{"max_time":335.6,"sim_time":199.766,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_idle":{"tests":{"chip_sw_kmac_idle":{"max_time":257.93,"sim_time":164.067,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_entropy_src_csrng":{"tests":{"chip_sw_entropy_src_csrng":{"max_time":2007.7,"sim_time":2224.147,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_edn_cmd":{"tests":{"chip_sw_entropy_src_csrng":{"max_time":2007.7,"sim_time":2224.147,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_fuse_en_sw_app_read":{"tests":{"chip_sw_csrng_fuse_en_sw_app_read_test":{"max_time":14.491102564148605,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_csrng_known_answer_tests":{"tests":{"chip_sw_csrng_kat_test":{"max_time":276.39,"sim_time":175.991,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_edn_entropy_reqs":{"tests":{"chip_sw_csrng_edn_concurrency":{"max_time":1898.42,"sim_time":899.837,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_op":{"tests":{"chip_sw_otbn_ecdsa_op_irq":{"max_time":3530.33,"sim_time":1494.104,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_ecdsa_op_irq_jitter_en":{"max_time":53.88,"sim_time":10.380001,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"chip_sw_otbn_rnd_entropy":{"tests":{"chip_sw_otbn_randomness":{"max_time":473.61,"sim_time":245.135,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_urnd_entropy":{"tests":{"chip_sw_otbn_randomness":{"max_time":473.61,"sim_time":245.135,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_idle":{"tests":{"chip_sw_otbn_randomness":{"max_time":473.61,"sim_time":245.135,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_mem_scramble":{"tests":{"chip_sw_otbn_mem_scramble":{"max_time":550.78,"sim_time":280.758,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rom_access":{"tests":{"chip_sw_rom_ctrl_integrity_check":{"max_time":1157.19,"sim_time":1294.046722,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rom_ctrl_integrity_check":{"tests":{"chip_sw_rom_ctrl_integrity_check":{"max_time":1157.19,"sim_time":1294.046722,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_sram_scrambled_access":{"tests":{"chip_sw_sram_ctrl_scrambled_access":{"max_time":548.59,"sim_time":350.27930499999997,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_scrambled_access_jitter_en":{"max_time":13.181643688119948,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"chip_sw_sram_execution":{"tests":{"chip_sw_sram_ctrl_execution_main":{"max_time":13.6103910561651,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_sram_lc_escalation":{"tests":{"chip_sw_all_escalation_resets":{"max_time":1393.49,"sim_time":943.433,"passed":0,"total":1,"percent":0.0},"chip_sw_data_integrity_escalation":{"max_time":13.702076086774468,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0},"chip_otp_ctrl_init":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_keys":{"tests":{"chip_sw_otbn_mem_scramble":{"max_time":550.78,"sim_time":280.758,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_scrambled_access":{"max_time":548.59,"sim_time":350.27930499999997,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_icache_invalidate":{"max_time":286.46,"sim_time":176.024362,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"chip_sw_otp_ctrl_entropy":{"tests":{"chip_sw_otbn_mem_scramble":{"max_time":550.78,"sim_time":280.758,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_scrambled_access":{"max_time":548.59,"sim_time":350.27930499999997,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_icache_invalidate":{"max_time":286.46,"sim_time":176.024362,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"chip_sw_otp_ctrl_program":{"tests":{"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_program_error":{"tests":{"chip_sw_lc_ctrl_program_error":{"max_time":13.69487228244543,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_hw_cfg":{"tests":{"chip_sw_lc_ctrl_otp_hw_cfg":{"max_time":11.793779228813946,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals":{"tests":{"chip_sw_otp_ctrl_lc_signals_test_unlocked0":{"max_time":13.35982763580978,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals_dev":{"max_time":19.465911949053407,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals_prod":{"max_time":20.569530294276774,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_lc_signals_rma":{"max_time":13.05564256105572,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_ctrl_transition":{"max_time":12.608451209031045,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_prim_tl_access":{"max_time":545.48,"sim_time":625.03,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":6,"percent":16.666666666666668},"chip_sw_otp_prim_tl_access":{"tests":{"chip_prim_tl_access":{"max_time":545.48,"sim_time":625.03,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_nvm_cnt":{"tests":{"chip_sw_otp_ctrl_nvm_cnt":{"max_time":18.067494886927307,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_sw_parts":{"tests":{"chip_sw_otp_ctrl_sw_parts":{"max_time":21.13799483049661,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_ast_clk_outputs":{"tests":{"chip_sw_ast_clk_outputs":{"max_time":71.12470400054008,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_ast_sys_clk_jitter":{"tests":{"chip_sw_otbn_ecdsa_op_irq_jitter_en":{"max_time":53.88,"sim_time":10.380001,"passed":0,"total":1,"percent":0.0},"chip_sw_aes_enc_jitter_en":{"max_time":56.34,"sim_time":10.400001,"passed":0,"total":1,"percent":0.0},"chip_sw_hmac_enc_jitter_en":{"max_time":61.589999999999996,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0},"chip_sw_kmac_mode_kmac_jitter_en":{"max_time":66.58,"sim_time":10.360001,"passed":0,"total":1,"percent":0.0},"chip_sw_sram_ctrl_scrambled_access_jitter_en":{"max_time":13.181643688119948,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_clkmgr_jitter":{"max_time":281.19,"sim_time":161.261,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":6,"percent":16.666666666666668},"chip_sw_soc_proxy_external_reset_requests":{"tests":{"chip_sw_soc_proxy_smoketest":{"max_time":244.59,"sim_time":156.32,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_soc_proxy_external_irqs":{"tests":{"chip_sw_soc_proxy_smoketest":{"max_time":244.59,"sim_time":156.32,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_soc_proxy_external_wakeup_requests":{"tests":{"chip_sw_soc_proxy_external_wakeup":{"max_time":252.31999999999996,"sim_time":157.913,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_soc_proxy_gpios":{"tests":{"chip_sw_soc_proxy_gpios":{"max_time":252.96,"sim_time":180.103094,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_nmi_irq":{"tests":{"chip_sw_rv_core_ibex_nmi_irq":{"max_time":498.28,"sim_time":269.301,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_rv_core_ibex_rnd":{"tests":{"chip_sw_rv_core_ibex_rnd":{"max_time":337.81,"sim_time":206.432,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_address_translation":{"tests":{"chip_sw_rv_core_ibex_address_translation":{"max_time":311.96,"sim_time":179.968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_icache_scrambled_access":{"tests":{"chip_sw_rv_core_ibex_icache_invalidate":{"max_time":286.46,"sim_time":176.024362,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_fault_dump":{"tests":{"chip_sw_rstmgr_cpu_info":{"max_time":570.14,"sim_time":412.096,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_rv_core_ibex_double_fault":{"tests":{"chip_sw_rstmgr_cpu_info":{"max_time":570.14,"sim_time":412.096,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_smoketest":{"tests":{"chip_sw_aes_smoketest":{"max_time":250.5,"sim_time":173.165,"passed":1,"total":1,"percent":100.0},"chip_sw_aon_timer_smoketest":{"max_time":304.44,"sim_time":182.384,"passed":1,"total":1,"percent":100.0},"chip_sw_clkmgr_smoketest":{"max_time":262.46,"sim_time":162.233,"passed":1,"total":1,"percent":100.0},"chip_sw_csrng_smoketest":{"max_time":266.07,"sim_time":164.287,"passed":1,"total":1,"percent":100.0},"chip_sw_gpio_smoketest":{"max_time":293.16,"sim_time":192.87206400000002,"passed":1,"total":1,"percent":100.0},"chip_sw_hmac_smoketest":{"max_time":315.63,"sim_time":195.004,"passed":1,"total":1,"percent":100.0},"chip_sw_kmac_smoketest":{"max_time":332.87,"sim_time":185.525,"passed":1,"total":1,"percent":100.0},"chip_sw_otbn_smoketest":{"max_time":445.51,"sim_time":230.213,"passed":1,"total":1,"percent":100.0},"chip_sw_otp_ctrl_smoketest":{"max_time":284.05,"sim_time":165.852,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_plic_smoketest":{"max_time":263.03,"sim_time":164.019,"passed":1,"total":1,"percent":100.0},"chip_sw_rv_timer_smoketest":{"max_time":394.69,"sim_time":266.827,"passed":1,"total":1,"percent":100.0},"chip_sw_rstmgr_smoketest":{"max_time":279.32,"sim_time":161.072,"passed":1,"total":1,"percent":100.0},"chip_sw_sram_ctrl_smoketest":{"max_time":246.16000000000003,"sim_time":164.565,"passed":1,"total":1,"percent":100.0},"chip_sw_uart_smoketest":{"max_time":279.55,"sim_time":175.224,"passed":1,"total":1,"percent":100.0}},"passed":14,"total":14,"percent":100.0},"chip_sw_rom_functests":{"tests":{"rom_keymgr_dpe_functest":{"max_time":12.664571405388415,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_signed":{"tests":{"chip_sw_uart_smoketest_signed":{"max_time":32.889939699321985,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_boot":{"tests":{"chip_sw_uart_tx_rx_bootstrap":{"max_time":42.26784963067621,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_secure_boot":{"tests":{"base_rom_e2e_smoke":{"max_time":10.905967402271926,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_lc_scrap":{"tests":{"chip_sw_lc_ctrl_rma_to_scrap":{"max_time":302.1,"sim_time":216.62061799999998,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_raw_to_scrap":{"max_time":276.94,"sim_time":212.238596,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_test_locked0_to_scrap":{"max_time":257.94,"sim_time":217.39012100000002,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_rand_to_scrap":{"max_time":277.13,"sim_time":213.79196,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"chip_lc_test_locked":{"tests":{"chip_sw_lc_walkthrough_testunlocks":{"max_time":12.538694819435477,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_rv_dm_lc_disabled":{"max_time":418.87,"sim_time":504.759,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0},"chip_sw_lc_walkthrough":{"tests":{"chip_sw_lc_walkthrough_dev":{"max_time":59.5980864437297,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_prod":{"max_time":50.31815089005977,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_prodend":{"max_time":13.187952747568488,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_rma":{"max_time":23.977849520742893,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_lc_walkthrough_testunlocks":{"max_time":12.538694819435477,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":5,"percent":0.0},"chip_sw_lc_ctrl_volatile_raw_unlock":{"tests":{"chip_sw_lc_ctrl_volatile_raw_unlock":{"max_time":712.22,"sim_time":610.949,"passed":1,"total":1,"percent":100.0},"chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz":{"max_time":941.3,"sim_time":708.969,"passed":1,"total":1,"percent":100.0},"rom_volatile_raw_unlock":{"max_time":128.9061462143436,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":2,"total":3,"percent":66.66666666666667},"chip_sw_rom_raw_unlock":{"tests":{"rom_raw_unlock":{"max_time":117.36327262595296,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_exit_test_unlocked_bootstrap":{"tests":{"chip_sw_exit_test_unlocked_bootstrap":{"max_time":42.262128572911024,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_inject_scramble_seed":{"tests":{"chip_sw_inject_scramble_seed":{"max_time":110.09154580812901,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_oob_addr_access":{"tests":{"chip_tl_errors":{"max_time":145.79,"sim_time":118.075,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_illegal_access":{"tests":{"chip_tl_errors":{"max_time":145.79,"sim_time":118.075,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"tl_d_outstanding_access":{"tests":{"chip_csr_aliasing":{"max_time":11.52,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_same_csr_outstanding":{"max_time":11.62,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0},"tl_d_partial_access":{"tests":{"chip_csr_aliasing":{"max_time":11.52,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_same_csr_outstanding":{"max_time":11.62,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0},"xbar_base_random_sequence":{"tests":{"xbar_random":{"max_time":17.34,"sim_time":22.803601,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"xbar_random_delay":{"tests":{"xbar_smoke_zero_delays":{"max_time":11.84,"sim_time":11.442523999999999,"passed":1,"total":1,"percent":100.0},"xbar_smoke_large_delays":{"max_time":335.32,"sim_time":2451.282807,"passed":1,"total":1,"percent":100.0},"xbar_smoke_slow_rsp":{"max_time":465.84,"sim_time":2036.195433,"passed":1,"total":1,"percent":100.0},"xbar_random_zero_delays":{"max_time":72.75,"sim_time":39.872997000000005,"passed":1,"total":1,"percent":100.0},"xbar_random_large_delays":{"max_time":1596.79,"sim_time":12449.451656,"passed":1,"total":1,"percent":100.0},"xbar_random_slow_rsp":{"max_time":2115.76,"sim_time":12601.515442,"passed":1,"total":1,"percent":100.0}},"passed":6,"total":6,"percent":100.0},"xbar_unmapped_address":{"tests":{"xbar_unmapped_addr":{"max_time":103.47,"sim_time":45.318878,"passed":1,"total":1,"percent":100.0},"xbar_error_and_unmapped_addr":{"max_time":42.86,"sim_time":55.827557,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"xbar_error_cases":{"tests":{"xbar_error_random":{"max_time":55.08,"sim_time":104.19194999999999,"passed":1,"total":1,"percent":100.0},"xbar_error_and_unmapped_addr":{"max_time":42.86,"sim_time":55.827557,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"xbar_all_access_same_device":{"tests":{"xbar_access_same_device":{"max_time":151.17,"sim_time":125.624837,"passed":1,"total":1,"percent":100.0},"xbar_access_same_device_slow_rsp":{"max_time":1002.9099999999999,"sim_time":4454.210516,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"xbar_all_hosts_use_same_source_id":{"tests":{"xbar_same_source":{"max_time":255.24000000000004,"sim_time":458.079409,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"xbar_stress_all":{"tests":{"xbar_stress_all":{"max_time":1281.89,"sim_time":2618.489181,"passed":1,"total":1,"percent":100.0},"xbar_stress_all_with_error":{"max_time":491.14,"sim_time":373.76374300000003,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"xbar_stress_with_reset":{"tests":{"xbar_stress_all_with_rand_reset":{"max_time":160.63,"sim_time":88.408433,"passed":1,"total":1,"percent":100.0},"xbar_stress_all_with_reset_error":{"max_time":1422.04,"sim_time":867.722979,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"rom_e2e_smoke":{"tests":{"rom_e2e_smoke":{"max_time":13.895767572335899,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rom_e2e_shutdown_output":{"tests":{"rom_e2e_shutdown_output":{"max_time":24.119997181929648,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rom_e2e_shutdown_exception_c":{"tests":{"rom_e2e_shutdown_exception_c":{"max_time":17.760592989623547,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid":{"tests":{"rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0":{"max_time":66.06230177823454,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_dev":{"max_time":16.756862038746476,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_prod":{"max_time":10.697262762114406,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_prod_end":{"max_time":13.430055526085198,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_good_rma":{"max_time":12.186874962411821,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0":{"max_time":164.20464286301285,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_dev":{"max_time":11.163863275200129,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_prod":{"max_time":11.810146981850266,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_prod_end":{"max_time":13.397895752452314,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_good_b_bad_rma":{"max_time":15.749311971478164,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0":{"max_time":75.58189467713237,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_dev":{"max_time":17.428312404081225,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_prod":{"max_time":21.900472693145275,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_prod_end":{"max_time":15.216247666627169,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_boot_policy_valid_a_bad_b_good_rma":{"max_time":19.29471875820309,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":15,"percent":0.0},"rom_e2e_sigverify_always":{"tests":{"rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0":{"max_time":182.56709138769656,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_dev":{"max_time":21.32029463071376,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_prod":{"max_time":25.044133372604847,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_prod_end":{"max_time":24.194543194957078,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_bad_rma":{"max_time":37.06064873561263,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0":{"max_time":148.01992167159915,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_dev":{"max_time":14.842853471636772,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_prod":{"max_time":15.894750535488129,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_prod_end":{"max_time":21.10820485651493,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_bad_b_nothing_rma":{"max_time":19.8778889272362,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0":{"max_time":139.28627087455243,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_dev":{"max_time":12.477485361509025,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_prod":{"max_time":14.916477365419269,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_prod_end":{"max_time":14.543403215706348,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_always_a_nothing_b_bad_rma":{"max_time":13.204659217968583,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":15,"percent":0.0},"rom_e2e_asm_init":{"tests":{"rom_e2e_asm_init_test_unlocked0":{"max_time":167.57915296871215,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_dev":{"max_time":12.415821090340614,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_prod":{"max_time":24.784837439656258,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_prod_end":{"max_time":12.15753104351461,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_asm_init_rma":{"max_time":12.805598448961973,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":5,"percent":0.0},"rom_e2e_keymgr_dpe_init":{"tests":{"rom_e2e_keymgr_dpe_init_rom_ext_meas":{"max_time":16.648823896422982,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_keymgr_dpe_init_rom_ext_no_meas":{"max_time":18.267395712435246,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas":{"max_time":19.64092447143048,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0},"rom_e2e_static_critical":{"tests":{"rom_e2e_static_critical":{"max_time":15.355645957402885,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":71,"total":195,"percent":36.41025641025641},"V2S":{"testpoints":{"chip_sw_aes_masking_off":{"tests":{"chip_sw_aes_masking_off":{"max_time":327.88,"sim_time":196.275118,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"chip_sw_rv_core_ibex_lockstep_glitch":{"tests":{"chip_sw_rv_core_ibex_lockstep_glitch":{"max_time":224.39,"sim_time":137.1645,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"chip_rv_dm_perform_debug":{"tests":{"rom_e2e_jtag_debug_test_unlocked0":{"max_time":31.694735479541123,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_dev":{"max_time":19.99207984097302,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_rma":{"max_time":19.39588814973831,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0},"chip_sw_rv_dm_access_after_hw_reset":{"tests":{"chip_sw_rv_dm_access_after_escalation_reset":{"max_time":21.605455848388374,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_plic_alerts":{"tests":{"chip_sw_all_escalation_resets":{"max_time":1393.49,"sim_time":943.433,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_vendor_test_csr_access":{"tests":{"chip_sw_otp_ctrl_vendor_test_csr_access":{"max_time":12.823699078522623,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_otp_ctrl_escalation":{"tests":{"chip_sw_otp_ctrl_escalation":{"max_time":298.14,"sim_time":176.94,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_coremark":{"tests":{"chip_sw_coremark":{"max_time":14.864935615099967,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"chip_sw_power_max_load":{"tests":{"chip_sw_power_virus":{"max_time":104.81630819104612,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rom_e2e_debug":{"tests":{"rom_e2e_jtag_debug_test_unlocked0":{"max_time":31.694735479541123,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_dev":{"max_time":19.99207984097302,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_debug_rma":{"max_time":19.39588814973831,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0},"rom_e2e_jtag_inject":{"tests":{"rom_e2e_jtag_inject_test_unlocked0":{"max_time":23.09448786545545,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_inject_dev":{"max_time":29.496711981482804,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_jtag_inject_rma":{"max_time":16.72863987274468,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0},"rom_e2e_self_hash":{"tests":{"rom_e2e_self_hash":{"max_time":186.13920649793,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":13,"percent":0.0},"unmapped":{"testpoints":{"Unmapped":{"tests":{"chip_sw_rstmgr_rst_cnsty_escalation":{"max_time":59.72,"sim_time":10.300001,"passed":0,"total":1,"percent":0.0},"chip_sw_aes_gcm":{"max_time":376.67,"sim_time":203.632,"passed":1,"total":1,"percent":100.0},"chip_sw_entropy_src_kat_test":{"max_time":247.82000000000002,"sim_time":163.65,"passed":1,"total":1,"percent":100.0},"chip_sw_entropy_src_ast_rng_req":{"max_time":253.6,"sim_time":161.177,"passed":1,"total":1,"percent":100.0},"chip_plic_all_irqs_0":{"max_time":582.44,"sim_time":327.718,"passed":1,"total":1,"percent":100.0},"chip_plic_all_irqs_10":{"max_time":483.9800000000001,"sim_time":300.65,"passed":1,"total":1,"percent":100.0},"chip_sw_dma_inline_hashing":{"max_time":370.68,"sim_time":210.503,"passed":1,"total":1,"percent":100.0},"chip_sw_dma_abort":{"max_time":387.5,"sim_time":211.731,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_test_unlocked0_otbn":{"max_time":40.12247960176319,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_test_unlocked0_sw":{"max_time":37.601286008022726,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_dev_otbn":{"max_time":12.472627467475832,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_dev_sw":{"max_time":22.669753869995475,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_prod_otbn":{"max_time":18.535998985171318,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_prod_sw":{"max_time":19.205935006961226,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_prod_end_otbn":{"max_time":11.757087455131114,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_prod_end_sw":{"max_time":19.438493493944407,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_rma_otbn":{"max_time":14.987404095940292,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"rom_e2e_sigverify_mod_exp_rma_sw":{"max_time":11.815674403682351,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"chip_sw_entropy_src_smoketest":{"max_time":356.58,"sim_time":207.111,"passed":1,"total":1,"percent":100.0},"chip_sw_mbx_smoketest":{"max_time":571.79,"sim_time":380.998446,"passed":1,"total":1,"percent":100.0}},"passed":8,"total":20,"percent":40.0}},"passed":8,"total":20,"percent":40.0}},"coverage":{"code":{"block":null,"line_statement":67.13,"branch":73.83,"condition_expression":64.05,"toggle":45.35,"fsm":57.14},"assertion":76.58,"functional":63.44},"cov_report_page":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[Otp]] file otp_ctrl_img_rma.vmem could not be opened for r mode":[{"name":"chip_csr_bit_bash","qual_name":"0.chip_csr_bit_bash.83251298725639694626587212106146595299497149564885487440208591097488288116049","seed":83251298725639694626587212106146595299497149564885487440208591097488288116049,"line":143,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_csr_bit_bash/latest/run.log","log_context":["UVM_INFO @   0.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_csr_aliasing","qual_name":"0.chip_csr_aliasing.95333695260188617680031538370803419235375059381253143946387109584696229266027","seed":95333695260188617680031538370803419235375059381253143946387109584696229266027,"line":143,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_csr_aliasing/latest/run.log","log_context":["UVM_INFO @   0.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_same_csr_outstanding","qual_name":"0.chip_same_csr_outstanding.99808551454587025924006221062643212290501889970327164098760033403025768825495","seed":99808551454587025924006221062643212290501889970327164098760033403025768825495,"line":143,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_same_csr_outstanding/latest/run.log","log_context":["UVM_INFO @   0.000000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (mem_bkdr_util.sv:658) [mem_bkdr_util[Rom0]] file example_test_from_rom_rom_prog_sim_dv.*.scr.vmem could not be opened for r mode":[{"name":"chip_sw_example_rom","qual_name":"0.chip_sw_example_rom.107584356909750786106624673757828378543184273303889157245668107727222920689358","seed":107584356909750786106624673757828378543184273303889157245668107727222920689358,"line":291,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_example_rom/latest/run.log","log_context":["UVM_INFO @  10.240001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Some pass patterns missing: ['^TEST PASSED (UVM_)?CHECKS$']":[{"name":"chip_sw_example_manufacturer","qual_name":"0.chip_sw_example_manufacturer.102038197769182710535352758961688740791151205375042499122790653939691618951695","seed":102038197769182710535352758961688740791151205375042499122790653939691618951695,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_example_manufacturer/latest/run.log","log_context":["ERROR: Analysis of target '@@+hooks+manufacturer_test_hooks//:example_test_sim_dv' failed; build aborted: Target @@+hooks+manufacturer_test_hooks//:example_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    @@+hooks+manufacturer_test_hooks//:example_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.483s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","FAILED: \n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_data_integrity_escalation","qual_name":"0.chip_sw_data_integrity_escalation.101289881190817995516057386011091755074244170315402268643350332597514547664764","seed":101289881190817995516057386011091755074244170315402268643350332597514547664764,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_data_integrity_escalation/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:data_integrity_escalation_reset_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:data_integrity_escalation_reset_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:data_integrity_escalation_reset_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.429s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_sleep_pin_wake","qual_name":"0.chip_sw_sleep_pin_wake.35196284085343949580330911502636455702666889531160671385777051498669749628189","seed":35196284085343949580330911502636455702666889531160671385777051498669749628189,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_sleep_pin_wake/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:sleep_pin_wake_test_sim_dv' failed; build aborted: Target //sw/device/tests:sleep_pin_wake_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:sleep_pin_wake_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.345s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_sleep_pin_retention","qual_name":"0.chip_sw_sleep_pin_retention.19006954708376980499485336588060074097251411123606009304691946869801992635614","seed":19006954708376980499485336588060074097251411123606009304691946869801992635614,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_sleep_pin_retention/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:sleep_pin_retention_test_sim_dv' failed; build aborted: Target //sw/device/tests:sleep_pin_retention_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:sleep_pin_retention_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.823s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_uart_tx_rx","qual_name":"0.chip_sw_uart_tx_rx.57330018620352582254185753771666500077240362915092005637835694435588952837741","seed":57330018620352582254185753771666500077240362915092005637835694435588952837741,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_uart_tx_rx/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests:uart_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:uart_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.276s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_uart_tx_rx_bootstrap","qual_name":"0.chip_sw_uart_tx_rx_bootstrap.75222082053012074487186455358718066879650637782208428452193658061977083626195","seed":75222082053012074487186455358718066879650637782208428452193658061977083626195,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_uart_tx_rx_bootstrap/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests:uart_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:uart_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 8.818s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_inject_scramble_seed","qual_name":"0.chip_sw_inject_scramble_seed.111387525852577498513917275589559594172771994104386153992840529755676702561349","seed":111387525852577498513917275589559594172771994104386153992840529755676702561349,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_inject_scramble_seed/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:inject_scramble_seed_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:inject_scramble_seed_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:inject_scramble_seed_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.084s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_exit_test_unlocked_bootstrap","qual_name":"0.chip_sw_exit_test_unlocked_bootstrap.67540136077537966002822789801686284782711486640984987742666896958899181286321","seed":67540136077537966002822789801686284782711486640984987742666896958899181286321,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_exit_test_unlocked_bootstrap/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:exit_test_unlocked_bootstrap_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:exit_test_unlocked_bootstrap_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:exit_test_unlocked_bootstrap_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 13.282s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_uart_rand_baudrate","qual_name":"0.chip_sw_uart_rand_baudrate.9871862301474872491063554537555321735495802743826212939366180945852409862935","seed":9871862301474872491063554537555321735495802743826212939366180945852409862935,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_uart_rand_baudrate/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests:uart_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:uart_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.445s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_uart_tx_rx_alt_clk_freq","qual_name":"0.chip_sw_uart_tx_rx_alt_clk_freq.22174113519559302742527451326989376498255819417679393606411016411027645205427","seed":22174113519559302742527451326989376498255819417679393606411016411027645205427,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_uart_tx_rx_alt_clk_freq/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:uart_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests:uart_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:uart_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 2.270s, Critical Path: 0.01s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_i2c_host_tx_rx","qual_name":"0.chip_sw_i2c_host_tx_rx.11990470681015736732057207764859634487380685517878347279465425390109313348864","seed":11990470681015736732057207764859634487380685517878347279465425390109313348864,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_i2c_host_tx_rx/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:i2c_host_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:i2c_host_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:i2c_host_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.957s, Critical Path: 0.05s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_i2c_device_tx_rx","qual_name":"0.chip_sw_i2c_device_tx_rx.38018328749862820177686172594686344736336417312514137983491767482133742761027","seed":38018328749862820177686172594686344736336417312514137983491767482133742761027,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_i2c_device_tx_rx/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:i2c_device_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:i2c_device_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:i2c_device_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 2.189s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_spi_device_tpm","qual_name":"0.chip_sw_spi_device_tpm.62672667029206132096442634297191439326939216234735892137072909488169206905368","seed":62672667029206132096442634297191439326939216234735892137072909488169206905368,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_spi_device_tpm/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:spi_device_tpm_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests:spi_device_tpm_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:spi_device_tpm_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.670s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_spi_host_tx_rx","qual_name":"0.chip_sw_spi_host_tx_rx.38076978770272276857021560347106935344160901966040750334606932638713349034781","seed":38076978770272276857021560347106935344160901966040750334606932638713349034781,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_spi_host_tx_rx/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:spi_host_tx_rx_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:spi_host_tx_rx_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:spi_host_tx_rx_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.383s, Critical Path: 0.02s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_ctrl_otp_hw_cfg","qual_name":"0.chip_sw_lc_ctrl_otp_hw_cfg.77767455258778154051618979490572046775647069414150665641645728678206897993720","seed":77767455258778154051618979490572046775647069414150665641645728678206897993720,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_ctrl_otp_hw_cfg/latest/run.log","log_context":["---- STDOUT ----\n","\n","---- STDERR ----\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:lc_ctrl_otp_hw_cfg_test_sim_dv': no such target '//sw/device/tests:lc_ctrl_otp_hw_cfg_test_sim_dv': target 'lc_ctrl_otp_hw_cfg_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD (did you mean lc_ctrl_otp_hw_cfg0_test_sim_dv?)\n","ERROR: no such target '//sw/device/tests:lc_ctrl_otp_hw_cfg_test_sim_dv': target 'lc_ctrl_otp_hw_cfg_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD (did you mean lc_ctrl_otp_hw_cfg0_test_sim_dv?)\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_lc_signals_test_unlocked0","qual_name":"0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.38909039818136163285498207489714300339454410635263590727709319885507074534368","seed":38909039818136163285498207489714300339454410635263590727709319885507074534368,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.903s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_lc_signals_dev","qual_name":"0.chip_sw_otp_ctrl_lc_signals_dev.66860745692632995322284621512711010738646051284202994492040804395325308178267","seed":66860745692632995322284621512711010738646051284202994492040804395325308178267,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_lc_signals_dev/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.857s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_lc_signals_prod","qual_name":"0.chip_sw_otp_ctrl_lc_signals_prod.113007890579222585857839797078998578280045264704510722011516226391535081196494","seed":113007890579222585857839797078998578280045264704510722011516226391535081196494,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_lc_signals_prod/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.800s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_lc_signals_rma","qual_name":"0.chip_sw_otp_ctrl_lc_signals_rma.28164628763119692282143070234848065168595771928996272861158586878472142143903","seed":28164628763119692282143070234848065168595771928996272861158586878472142143903,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_lc_signals_rma/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:otp_ctrl_lc_signals_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.581s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_vendor_test_csr_access","qual_name":"0.chip_sw_otp_ctrl_vendor_test_csr_access.108799468527880830225985190565963646320369058152037512980263121860880602196422","seed":108799468527880830225985190565963646320369058152037512980263121860880602196422,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_vendor_test_csr_access/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:otp_ctrl_vendor_test_csr_access_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:otp_ctrl_vendor_test_csr_access_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:otp_ctrl_vendor_test_csr_access_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.422s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_nvm_cnt","qual_name":"0.chip_sw_otp_ctrl_nvm_cnt.62611092242663080677785449267668038708700775058526501797160463272656258477685","seed":62611092242663080677785449267668038708700775058526501797160463272656258477685,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_nvm_cnt/latest/run.log","log_context":["Another command (pid=519907) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=522716) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=504020) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:otp_ctrl_nvm_cnt_test_sim_dv': no such target '//sw/device/tests:otp_ctrl_nvm_cnt_test_sim_dv': target 'otp_ctrl_nvm_cnt_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: no such target '//sw/device/tests:otp_ctrl_nvm_cnt_test_sim_dv': target 'otp_ctrl_nvm_cnt_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_otp_ctrl_sw_parts","qual_name":"0.chip_sw_otp_ctrl_sw_parts.75848317584888873386088213461966614360610778183914128278180746431632568105627","seed":75848317584888873386088213461966614360610778183914128278180746431632568105627,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_sw_parts/latest/run.log","log_context":["Another command (pid=482262) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=505841) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=525361) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:otp_ctrl_sw_parts_test_sim_dv': no such target '//sw/device/tests:otp_ctrl_sw_parts_test_sim_dv': target 'otp_ctrl_sw_parts_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: no such target '//sw/device/tests:otp_ctrl_sw_parts_test_sim_dv': target 'otp_ctrl_sw_parts_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_ctrl_transition","qual_name":"0.chip_sw_lc_ctrl_transition.67661646535431090728808159767432142968921420378045747234643834976030477502175","seed":67661646535431090728808159767432142968921420378045747234643834976030477502175,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_ctrl_transition/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_ctrl_transition_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_ctrl_transition_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_ctrl_transition_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.407s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_walkthrough_dev","qual_name":"0.chip_sw_lc_walkthrough_dev.104696366274041819932740065338503769607062495120728197863658210102512781844979","seed":104696366274041819932740065338503769607062495120728197863658210102512781844979,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_walkthrough_dev/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 21.952s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_walkthrough_prod","qual_name":"0.chip_sw_lc_walkthrough_prod.32459213512752868347960168057806978543999761062845468224252228127833018478337","seed":32459213512752868347960168057806978543999761062845468224252228127833018478337,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_walkthrough_prod/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 6.200s, Critical Path: 0.01s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_walkthrough_prodend","qual_name":"0.chip_sw_lc_walkthrough_prodend.71835533815242329363930255799083254910680971937044861148360072362010215828370","seed":71835533815242329363930255799083254910680971937044861148360072362010215828370,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_walkthrough_prodend/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.373s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_walkthrough_rma","qual_name":"0.chip_sw_lc_walkthrough_rma.40216860761661390712169645196052897941899667785667641858711375682793057781881","seed":40216860761661390712169645196052897941899667785667641858711375682793057781881,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_walkthrough_rma/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_walkthrough_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 2.798s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_walkthrough_testunlocks","qual_name":"0.chip_sw_lc_walkthrough_testunlocks.79509107656340345419945508586931310346271042925395615572761713441947019306105","seed":79509107656340345419945508586931310346271042925395615572761713441947019306105,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_walkthrough_testunlocks/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_walkthrough_testunlocks_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_walkthrough_testunlocks_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_walkthrough_testunlocks_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.339s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_pwrmgr_main_power_glitch_reset","qual_name":"0.chip_sw_pwrmgr_main_power_glitch_reset.36177127858637289207689126787989388667198937220004261957132181906639765616262","seed":36177127858637289207689126787989388667198937220004261957132181906639765616262,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_pwrmgr_main_power_glitch_reset/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:pwrmgr_main_power_glitch_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:pwrmgr_main_power_glitch_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:pwrmgr_main_power_glitch_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 2.616s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_pwrmgr_sleep_power_glitch_reset","qual_name":"0.chip_sw_pwrmgr_sleep_power_glitch_reset.15270062222631515275193459805351987868963934833439398334324316251408044959650","seed":15270062222631515275193459805351987868963934833439398334324316251408044959650,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_pwrmgr_sleep_power_glitch_reset/latest/run.log","log_context":["ERROR: Analysis of target '//sw/device/tests/sim_dv:pwrmgr_sleep_power_glitch_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:pwrmgr_sleep_power_glitch_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:pwrmgr_sleep_power_glitch_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.142s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","FAILED: \n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_pwrmgr_deep_sleep_power_glitch_reset","qual_name":"0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.76161555847667565287631734175710277141265374260599168768320957479524757363843","seed":76161555847667565287631734175710277141265374260599168768320957479524757363843,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:pwrmgr_deep_sleep_power_glitch_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:pwrmgr_deep_sleep_power_glitch_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:pwrmgr_deep_sleep_power_glitch_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.573s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_pwrmgr_random_sleep_power_glitch_reset","qual_name":"0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.45167196068629836874778579431913020742336302094172235698229655307923781452458","seed":45167196068629836874778579431913020742336302094172235698229655307923781452458,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:pwrmgr_random_sleep_power_glitch_reset_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:pwrmgr_random_sleep_power_glitch_reset_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:pwrmgr_random_sleep_power_glitch_reset_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 6.372s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_pwrmgr_sleep_disabled","qual_name":"0.chip_sw_pwrmgr_sleep_disabled.75997026499098458491219154933649359189426011417127143721803515885861028148010","seed":75997026499098458491219154933649359189426011417127143721803515885861028148010,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_pwrmgr_sleep_disabled/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:pwrmgr_sleep_disabled_test_sim_dv' failed; build aborted: Target //sw/device/tests:pwrmgr_sleep_disabled_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:pwrmgr_sleep_disabled_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.969s, Critical Path: 0.01s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_pwrmgr_wdog_reset","qual_name":"0.chip_sw_pwrmgr_wdog_reset.114747310807199607798501460216387803717407361932605618050903529734318198723680","seed":114747310807199607798501460216387803717407361932605618050903529734318198723680,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_pwrmgr_wdog_reset/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:pwrmgr_wdog_reset_reqs_test_sim_dv' failed; build aborted: Target //sw/device/tests:pwrmgr_wdog_reset_reqs_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:pwrmgr_wdog_reset_reqs_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.388s, Critical Path: 0.01s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_test","qual_name":"0.chip_sw_alert_test.63511020767582327355732671354758539679871229585313999364315460021310340228850","seed":63511020767582327355732671354758539679871229585313999364315460021310340228850,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_test/latest/run.log","log_context":["Another command (pid=686462) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests/autogen/top_darjeeling:alert_test_sim_dv': no such package 'sw/device/tests/autogen/top_darjeeling': BUILD file not found in any of the following directories. Add a BUILD file to a directory to mark it as a package.\n"," - sw/device/tests/autogen/top_darjeeling\n","ERROR: no such package 'sw/device/tests/autogen/top_darjeeling': BUILD file not found in any of the following directories. Add a BUILD file to a directory to mark it as a package.\n"," - sw/device/tests/autogen/top_darjeeling\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_escalation","qual_name":"0.chip_sw_alert_handler_escalation.103959805659703525348544792876529171578985252247652275435861577939244134434377","seed":103959805659703525348544792876529171578985252247652275435861577939244134434377,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_escalation/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:alert_handler_escalation_test_sim_dv' failed; build aborted: Target //sw/device/tests:alert_handler_escalation_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:alert_handler_escalation_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 6.868s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_reverse_ping_in_deep_sleep","qual_name":"0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.29183290199804744719233532718688264958184462944895912395008386755836873988720","seed":29183290199804744719233532718688264958184462944895912395008386755836873988720,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:alert_handler_reverse_ping_in_deep_sleep_test_sim_dv' failed; build aborted: Target //sw/device/tests:alert_handler_reverse_ping_in_deep_sleep_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:alert_handler_reverse_ping_in_deep_sleep_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.203s, Critical Path: 0.05s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_lpg_sleep_mode_alerts","qual_name":"0.chip_sw_alert_handler_lpg_sleep_mode_alerts.11090217496522238901357228503244673158428704748760223667291729590848618246938","seed":11090217496522238901357228503244673158428704748760223667291729590848618246938,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_lpg_sleep_mode_alerts/latest/run.log","log_context":["Another command (pid=425144) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=354246) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=398460) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:alert_handler_lpg_sleep_mode_alerts_test_sim_dv': no such target '//sw/device/tests:alert_handler_lpg_sleep_mode_alerts_test_sim_dv': target 'alert_handler_lpg_sleep_mode_alerts_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: no such target '//sw/device/tests:alert_handler_lpg_sleep_mode_alerts_test_sim_dv': target 'alert_handler_lpg_sleep_mode_alerts_test_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_lpg_sleep_mode_pings","qual_name":"0.chip_sw_alert_handler_lpg_sleep_mode_pings.52501926157053518929106656554794882685744552606839394394061187178345921329370","seed":52501926157053518929106656554794882685744552606839394394061187178345921329370,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_lpg_sleep_mode_pings/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:alert_handler_lpg_sleep_mode_pings_test_sim_dv' failed; build aborted: Target //sw/device/tests:alert_handler_lpg_sleep_mode_pings_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:alert_handler_lpg_sleep_mode_pings_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 16.913s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_lpg_clkoff","qual_name":"0.chip_sw_alert_handler_lpg_clkoff.10146026289146174437701453844321695713288935703072742839669160409672674609635","seed":10146026289146174437701453844321695713288935703072742839669160409672674609635,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_lpg_clkoff/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:alert_handler_lpg_clkoff_test_sim_dv' failed; build aborted: Target //sw/device/tests:alert_handler_lpg_clkoff_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:alert_handler_lpg_clkoff_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.948s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_lpg_reset_toggle","qual_name":"0.chip_sw_alert_handler_lpg_reset_toggle.33564668417795601261307687740655267649219659747788330934768428910259165141792","seed":33564668417795601261307687740655267649219659747788330934768428910259165141792,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_lpg_reset_toggle/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:alert_handler_lpg_reset_toggle_test_sim_dv' failed; build aborted: Target //sw/device/tests:alert_handler_lpg_reset_toggle_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:alert_handler_lpg_reset_toggle_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 2.440s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_alert_handler_entropy","qual_name":"0.chip_sw_alert_handler_entropy.14052942069295766066607016342828604401291294213470093245502272725527706509871","seed":14052942069295766066607016342828604401291294213470093245502272725527706509871,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_alert_handler_entropy/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:alert_handler_entropy_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:alert_handler_entropy_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:alert_handler_entropy_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 40.864s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_csrng_fuse_en_sw_app_read_test","qual_name":"0.chip_sw_csrng_fuse_en_sw_app_read_test.8211197221318110988860803551939081699274775529526163439606779061944075572305","seed":8211197221318110988860803551939081699274775529526163439606779061944075572305,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_csrng_fuse_en_sw_app_read_test/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:csrng_fuse_en_sw_app_read_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:csrng_fuse_en_sw_app_read_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:csrng_fuse_en_sw_app_read_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.756s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_kmac_app_rom","qual_name":"0.chip_sw_kmac_app_rom.111197072358868691592637946917575177779705735847170337536302415195692885910698","seed":111197072358868691592637946917575177779705735847170337536302415195692885910698,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_kmac_app_rom/latest/run.log","log_context":["INFO: [build_sw_collateral_for_sim.py:207] cquery_cmd = ./bazelisk.sh cquery labels(data, //sw/device/tests:kmac_app_rom_test_sim_dv) union labels(srcs, //sw/device/tests:kmac_app_rom_test_sim_dv) --ui_event_filters=-info --noshow_progress --//hw/top=darjeeling --//hw/top=darjeeling --output=starlark\n","---- STDOUT ----\n","\n","---- STDERR ----\n","Another command (pid=1161088) is running. Waiting for it to complete on the server (server_pid=209140)...\n","ERROR: Error doing post analysis query: Evaluation of subquery \"labels('data', //sw/device/tests:kmac_app_rom_test_sim_dv)\" failed (did you want to use --keep_going?): in 'data' of rule //sw/device/tests:kmac_app_rom_test_sim_dv: configured target of type test_suite does not have attribute 'data'\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_sram_ctrl_scrambled_access_jitter_en","qual_name":"0.chip_sw_sram_ctrl_scrambled_access_jitter_en.89141676949178098276246744778069988881196238381131754648563730951758027693515","seed":89141676949178098276246744778069988881196238381131754648563730951758027693515,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_sram_ctrl_scrambled_access_jitter_en/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=1377201) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests/sim_dv:sram_ctrl_scrambled_access_test_sim_dv': no such target '//sw/device/tests/sim_dv:sram_ctrl_scrambled_access_test_sim_dv': target 'sram_ctrl_scrambled_access_test_sim_dv' not declared in package 'sw/device/tests/sim_dv' defined by /nightly/current_run/opentitan/sw/device/tests/sim_dv/BUILD\n","ERROR: no such target '//sw/device/tests/sim_dv:sram_ctrl_scrambled_access_test_sim_dv': target 'sram_ctrl_scrambled_access_test_sim_dv' not declared in package 'sw/device/tests/sim_dv' defined by /nightly/current_run/opentitan/sw/device/tests/sim_dv/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_sram_ctrl_execution_main","qual_name":"0.chip_sw_sram_ctrl_execution_main.94607662369582789953912486833510986156249082657011974774976566988968310601707","seed":94607662369582789953912486833510986156249082657011974774976566988968310601707,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_sram_ctrl_execution_main/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:sram_ctrl_execution_main_test_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:sram_ctrl_execution_main_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:sram_ctrl_execution_main_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.377s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_coremark","qual_name":"0.chip_sw_coremark.106306389986118151140907219636913093605516996700591811094877714001580221266439","seed":106306389986118151140907219636913093605516996700591811094877714001580221266439,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_coremark/latest/run.log","log_context":["Another command (pid=500205) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//third_party/coremark/top_darjeeling:coremark_test_sim_dv': no such package 'third_party/coremark/top_darjeeling': BUILD file not found in any of the following directories. Add a BUILD file to a directory to mark it as a package.\n"," - third_party/coremark/top_darjeeling\n","ERROR: no such package 'third_party/coremark/top_darjeeling': BUILD file not found in any of the following directories. Add a BUILD file to a directory to mark it as a package.\n"," - third_party/coremark/top_darjeeling\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_clkmgr_reset_frequency","qual_name":"0.chip_sw_clkmgr_reset_frequency.62480237727390369529183276539374800317236195455303962356834061683056148556087","seed":62480237727390369529183276539374800317236195455303962356834061683056148556087,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_clkmgr_reset_frequency/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:clkmgr_reset_frequency_test_sim_dv' failed; build aborted: Target //sw/device/tests:clkmgr_reset_frequency_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:clkmgr_reset_frequency_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.420s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_clkmgr_sleep_frequency","qual_name":"0.chip_sw_clkmgr_sleep_frequency.1977883072217835777035310910617996386843015911474365916882856756096719796160","seed":1977883072217835777035310910617996386843015911474365916882856756096719796160,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_clkmgr_sleep_frequency/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:clkmgr_sleep_frequency_test_sim_dv' failed; build aborted: Target //sw/device/tests:clkmgr_sleep_frequency_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:clkmgr_sleep_frequency_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.424s, Critical Path: 0.06s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_ast_clk_outputs","qual_name":"0.chip_sw_ast_clk_outputs.39166479700191117590190235063508197589385549107478979696772906280688080334248","seed":39166479700191117590190235063508197589385549107478979696772906280688080334248,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_ast_clk_outputs/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:ast_clk_outs_test_sim_dv' failed; build aborted: Target //sw/device/tests:ast_clk_outs_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:ast_clk_outs_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 28.852s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_lc_ctrl_program_error","qual_name":"0.chip_sw_lc_ctrl_program_error.50807350727778003868675907378866164443401162520103083422480486610142372229003","seed":50807350727778003868675907378866164443401162520103083422480486610142372229003,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_lc_ctrl_program_error/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests/sim_dv:lc_ctrl_program_error_sim_dv' failed; build aborted: Target //sw/device/tests/sim_dv:lc_ctrl_program_error_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests/sim_dv:lc_ctrl_program_error_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.403s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_rv_dm_ndm_reset_req_when_cpu_halted","qual_name":"0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.12106246175407497536620754268894593723651626757233762216233351387940283020511","seed":12106246175407497536620754268894593723651626757233762216233351387940283020511,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=1324614) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted_sim_dv': no such target '//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted_sim_dv': target 'rv_dm_ndm_reset_req_when_cpu_halted_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD (did you mean rv_dm_ndm_reset_req_when_cpu_halted_dev_sim_dv, or rv_dm_ndm_reset_req_when_cpu_halted_rma_sim_dv?)\n","ERROR: no such target '//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted_sim_dv': target 'rv_dm_ndm_reset_req_when_cpu_halted_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD (did you mean rv_dm_ndm_reset_req_when_cpu_halted_dev_sim_dv, or rv_dm_ndm_reset_req_when_cpu_halted_rma_sim_dv?)\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_rv_dm_access_after_wakeup","qual_name":"0.chip_sw_rv_dm_access_after_wakeup.50899390915373955694375843367771911686980855755547447072292973587067471727220","seed":50899390915373955694375843367771911686980855755547447072292973587067471727220,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rv_dm_access_after_wakeup/latest/run.log","log_context":["Another command (pid=1320851) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=1318697) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=1321971) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:rv_dm_access_after_wakeup_sim_dv': no such target '//sw/device/tests:rv_dm_access_after_wakeup_sim_dv': target 'rv_dm_access_after_wakeup_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD (did you mean rv_dm_access_after_wakeup_dev_sim_dv, or rv_dm_access_after_wakeup_rma_sim_dv?)\n","ERROR: no such target '//sw/device/tests:rv_dm_access_after_wakeup_sim_dv': target 'rv_dm_access_after_wakeup_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD (did you mean rv_dm_access_after_wakeup_dev_sim_dv, or rv_dm_access_after_wakeup_rma_sim_dv?)\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_rv_dm_access_after_escalation_reset","qual_name":"0.chip_sw_rv_dm_access_after_escalation_reset.48909013096017831601250079865648470135612436805115945323114132349223774795711","seed":48909013096017831601250079865648470135612436805115945323114132349223774795711,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rv_dm_access_after_escalation_reset/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:alert_handler_escalation_test_sim_dv' failed; build aborted: Target //sw/device/tests:alert_handler_escalation_test_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:alert_handler_escalation_test_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 1.248s, Critical Path: 0.04s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_power_virus","qual_name":"0.chip_sw_power_virus.48327414274067483348863623767495280527528586757745196262010574655688271496774","seed":48327414274067483348863623767495280527528586757745196262010574655688271496774,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_power_virus/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/tests:power_virus_systemtest_sim_dv' failed; build aborted: Target //sw/device/tests:power_virus_systemtest_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/tests:power_virus_systemtest_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 2.598s, Critical Path: 0.01s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"base_rom_e2e_smoke","qual_name":"0.base_rom_e2e_smoke.36463423072508401896212815541483889750705332068438528930545609409631126924841","seed":36463423072508401896212815541483889750705332068438528930545609409631126924841,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.base_rom_e2e_smoke/latest/run.log","log_context":["    _deploy_software_collateral(args)\n","    ~~~~~~~~~~~~~~~~~~~~~~~~~~~^^^^^^\n","  File \"/nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py\", line 329, in _deploy_software_collateral\n","    image_string = ImageString(image)\n","  File \"<string>\", line 4, in __init__\n","  File \"/nightly/current_run/opentitan/util/py/scripts/build_sw_collateral_for_sim.py\", line 261, in __post_init__\n","    assert flag in KNOWN_FLAGS, f\"Unknown flag '{flag}' used in sw_image '{self.raw}'\"\n","           ^^^^^^^^^^^^^^^^^^^\n","AssertionError: Unknown flag 'test_in_second_rom' used in sw_image '//sw/device/silicon_creator/rom/e2e:base_rom_e2e_smoke:7:test_in_second_rom'\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_smoke","qual_name":"0.rom_e2e_smoke.73195080134299639558021784155065637327702238143602956294634638880646197758280","seed":73195080134299639558021784155065637327702238143602956294634638880646197758280,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_smoke/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=1390166) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=1390879) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_shutdown_exception_c","qual_name":"0.rom_e2e_shutdown_exception_c.113399489398096314291794078703699663612627720113985382229940005314934422936483","seed":113399489398096314291794078703699663612627720113985382229940005314934422936483,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_shutdown_exception_c/latest/run.log","log_context":["Another command (pid=578325) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=579685) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=585219) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv': no such target '//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv': target 'rom_with_fake_keys_sim_dv' not declared in package 'sw/device/silicon_creator/rom' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv': target 'rom_with_fake_keys_sim_dv' not declared in package 'sw/device/silicon_creator/rom' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_shutdown_output","qual_name":"0.rom_e2e_shutdown_output.18311825830027596921072900518486973995248301578515998727449283432922433874534","seed":18311825830027596921072900518486973995248301578515998727449283432922433874534,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_shutdown_output/latest/run.log","log_context":["Another command (pid=580203) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=585787) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=597037) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.63289788964115739198116527342144967650150153241073498358847890624133688054551","seed":63289788964115739198116527342144967650150153241073498358847890624133688054551,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0/latest/run.log","log_context":["Another command (pid=319242) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=356731) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=327000) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_dev","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_dev.35094902013170083216973170566158236528932341093539919567409718691539528902096","seed":35094902013170083216973170566158236528932341093539919567409718691539528902096,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_dev/latest/run.log","log_context":["Another command (pid=548725) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=545111) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=554215) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_prod","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_prod.9873618329903516261956107390698156809856054686623595059117850192200625501368","seed":9873618329903516261956107390698156809856054686623595059117850192200625501368,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_prod/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=542632) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_prod_end","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.110975115510201746439440032033014120310605818347531843689141268981097840422876","seed":110975115510201746439440032033014120310605818347531843689141268981097840422876,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end/latest/run.log","log_context":["Another command (pid=535669) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=545111) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=554215) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_good_rma","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_good_rma.110849996948206466070384208541729531444890254718241866768642045059288211966462","seed":110849996948206466070384208541729531444890254718241866768642045059288211966462,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_good_rma/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=545111) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=554215) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.84557548666341492630705148258891072604300147292775018461470199751172239115842","seed":84557548666341492630705148258891072604300147292775018461470199751172239115842,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0/latest/run.log","log_context":["Another command (pid=326399) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=487382) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=380032) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_dev","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.33804497012731106097474493201489980224737638696728514232095366217148789727207","seed":33804497012731106097474493201489980224737638696728514232095366217148789727207,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=525361) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=513693) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_prod","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.69024881906764288560199018259106998028969852797908675039153561852158666119330","seed":69024881906764288560199018259106998028969852797908675039153561852158666119330,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod/latest/run.log","log_context":["Another command (pid=540019) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=534701) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=543158) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_prod_end","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.107813332129841009137349354181719825685075762073584269399984260908758741457420","seed":107813332129841009137349354181719825685075762073584269399984260908758741457420,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end/latest/run.log","log_context":["Another command (pid=542531) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=545067) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=534573) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_good_b_bad_rma","qual_name":"0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.17352355004715058707196043350626086318434428765970150982571083953928023012844","seed":17352355004715058707196043350626086318434428765970150982571083953928023012844,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma/latest/run.log","log_context":["Another command (pid=518855) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=534047) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=535669) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.33944568419515192144151640339030457184763644744721584665191642293011963162797","seed":33944568419515192144151640339030457184763644744721584665191642293011963162797,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=319302) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_dev","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.63202418913542101342172595630589946972443918799668031993589473833560484850003","seed":63202418913542101342172595630589946972443918799668031993589473833560484850003,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=516136) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_prod","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.34943934956741255462304435582378211331650026194810615778039940609278471020777","seed":34943934956741255462304435582378211331650026194810615778039940609278471020777,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=544154) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_prod_end","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.74659405885286757690444500577000363288960518837141252194386870858377384991423","seed":74659405885286757690444500577000363288960518837141252194386870858377384991423,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=531144) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_boot_policy_valid_a_bad_b_good_rma","qual_name":"0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.111033312389730255171726440435721433467304791720114099549061156195455197367927","seed":111033312389730255171726440435721433467304791720114099549061156195455197367927,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma/latest/run.log","log_context":["Another command (pid=548725) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=545111) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=554215) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_sim_dv': target 'empty_test_slot_b_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.43713549294110949120075593714651444003868693057942066138249375437405834233701","seed":43713549294110949120075593714651444003868693057942066138249375437405834233701,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0/latest/run.log","log_context":["Another command (pid=495383) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=495771) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=496291) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': target 'otp_img_sigverify_always_test_unlocked0' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': target 'otp_img_sigverify_always_test_unlocked0' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_dev","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_dev.44366560341678410218525685883868395958092383916122724193944238273078241115898","seed":44366560341678410218525685883868395958092383916122724193944238273078241115898,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_dev/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=591752) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': target 'otp_img_sigverify_always_dev' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': target 'otp_img_sigverify_always_dev' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_prod","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_prod.445493700748488097494000138460304469848351721727425518432013629975086960474","seed":445493700748488097494000138460304469848351721727425518432013629975086960474,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_prod/latest/run.log","log_context":["Another command (pid=597037) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=603221) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=588262) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': target 'otp_img_sigverify_always_prod' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': target 'otp_img_sigverify_always_prod' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_prod_end","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.103087236968526254832706283334467260101774806548784647922545801943987483204901","seed":103087236968526254832706283334467260101774806548784647922545801943987483204901,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end/latest/run.log","log_context":["Another command (pid=595540) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=597037) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=576849) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': target 'otp_img_sigverify_always_prod_end' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': target 'otp_img_sigverify_always_prod_end' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_bad_rma","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_bad_rma.3315254883005874402816590194966710903209822903120515722780829682799581291644","seed":3315254883005874402816590194966710903209822903120515722780829682799581291644,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_bad_rma/latest/run.log","log_context":["Another command (pid=616632) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=628113) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=620762) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': target 'otp_img_sigverify_always_rma' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': target 'otp_img_sigverify_always_rma' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.38555189498415687922631678273944376074022037886929525883717061391166587924968","seed":38555189498415687922631678273944376074022037886929525883717061391166587924968,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=402993) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=398039) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': target 'otp_img_sigverify_always_test_unlocked0' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': target 'otp_img_sigverify_always_test_unlocked0' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_dev","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.63331507585016417745754295158159609240928154560639832647397680654445091608032","seed":63331507585016417745754295158159609240928154560639832647397680654445091608032,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=582205) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': target 'otp_img_sigverify_always_dev' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': target 'otp_img_sigverify_always_dev' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_prod","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.111419674252229771045782836679234394002578581973505852305421690965218470598542","seed":111419674252229771045782836679234394002578581973505852305421690965218470598542,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod/latest/run.log","log_context":["Another command (pid=572308) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=568540) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=578207) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': target 'otp_img_sigverify_always_prod' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': target 'otp_img_sigverify_always_prod' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_prod_end","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.80006687756910752647818157249708063452762459343673488977246601568306110157273","seed":80006687756910752647818157249708063452762459343673488977246601568306110157273,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end/latest/run.log","log_context":["Another command (pid=585787) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=597037) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=603221) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': target 'otp_img_sigverify_always_prod_end' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': target 'otp_img_sigverify_always_prod_end' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_bad_b_nothing_rma","qual_name":"0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.18472509036985445654179160938141474958629453502228598531576690697832111887289","seed":18472509036985445654179160938141474958629453502228598531576690697832111887289,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma/latest/run.log","log_context":["Another command (pid=585787) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=595540) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=597037) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': target 'otp_img_sigverify_always_rma' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': target 'otp_img_sigverify_always_rma' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.31857626948226851566887898463877297728633942302914081054855935735118893456483","seed":31857626948226851566887898463877297728633942302914081054855935735118893456483,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0/latest/run.log","log_context":["Another command (pid=487382) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=380032) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=485403) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': target 'otp_img_sigverify_always_test_unlocked0' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_test_unlocked0': target 'otp_img_sigverify_always_test_unlocked0' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_dev","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.77213970198617298622664788062232399305175719974061896931353626390349614443303","seed":77213970198617298622664788062232399305175719974061896931353626390349614443303,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=601017) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': target 'otp_img_sigverify_always_dev' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_dev': target 'otp_img_sigverify_always_dev' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_prod","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.66579643580897774289308964957395460613330651418744860421002589231698535203402","seed":66579643580897774289308964957395460613330651418744860421002589231698535203402,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod/latest/run.log","log_context":["Another command (pid=605980) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=610277) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=608508) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': target 'otp_img_sigverify_always_prod' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod': target 'otp_img_sigverify_always_prod' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_prod_end","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.85067670694708034252556827679498441136012108970598507107659222074512229890274","seed":85067670694708034252556827679498441136012108970598507107659222074512229890274,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end/latest/run.log","log_context":["Another command (pid=612784) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=610454) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=614252) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': target 'otp_img_sigverify_always_prod_end' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_prod_end': target 'otp_img_sigverify_always_prod_end' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_always_a_nothing_b_bad_rma","qual_name":"0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.34774996144210733029399228133661740869101879538215139831620209881484403538617","seed":34774996144210733029399228133661740869101879538215139831620209881484403538617,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma/latest/run.log","log_context":["Another command (pid=611663) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=608508) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=610214) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': target 'otp_img_sigverify_always_rma' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_always_rma': target 'otp_img_sigverify_always_rma' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_test_unlocked0","qual_name":"0.rom_e2e_asm_init_test_unlocked0.11677221516897667100545456308922410336626900855122761121357445001478243333249","seed":11677221516897667100545456308922410336626900855122761121357445001478243333249,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_asm_init_test_unlocked0/latest/run.log","log_context":["Another command (pid=428308) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=391135) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=387882) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_dev","qual_name":"0.rom_e2e_asm_init_dev.62740477331188343557112355135193823864974717935924985477896585707676193677877","seed":62740477331188343557112355135193823864974717935924985477896585707676193677877,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_asm_init_dev/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=510916) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_prod","qual_name":"0.rom_e2e_asm_init_prod.14171858833351789478951696728475759265857795315194733219833089382518878935526","seed":14171858833351789478951696728475759265857795315194733219833089382518878935526,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_asm_init_prod/latest/run.log","log_context":["Another command (pid=545067) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=534573) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=542632) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_prod_end","qual_name":"0.rom_e2e_asm_init_prod_end.22997635056625713925358373181129284630904937756880998397409375986601719677061","seed":22997635056625713925358373181129284630904937756880998397409375986601719677061,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_asm_init_prod_end/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=522716) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=504020) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_asm_init_rma","qual_name":"0.rom_e2e_asm_init_rma.82956161066484983149497932229055649769172560842574993043562666537833542517523","seed":82956161066484983149497932229055649769172560842574993043562666537833542517523,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_asm_init_rma/latest/run.log","log_context":["Another command (pid=504020) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=525111) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=338086) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_jtag_debug_test_unlocked0","qual_name":"0.rom_e2e_jtag_debug_test_unlocked0.87390059451893697435823961320601708291334133499411192486960121252993926508780","seed":87390059451893697435823961320601708291334133499411192486960121252993926508780,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_jtag_debug_test_unlocked0/latest/run.log","log_context":["Another command (pid=605980) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=610277) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=600130) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:img_test_unlocked0_exec_disabled': no such target '//sw/device/silicon_creator/rom/e2e:img_test_unlocked0_exec_disabled': target 'img_test_unlocked0_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:img_test_unlocked0_exec_disabled': target 'img_test_unlocked0_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_jtag_debug_dev","qual_name":"0.rom_e2e_jtag_debug_dev.5760933062957340493244521878265282058314237903694480874943709075088190193634","seed":5760933062957340493244521878265282058314237903694480874943709075088190193634,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_jtag_debug_dev/latest/run.log","log_context":["Another command (pid=578325) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=577743) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=582205) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_jtag_debug_rma","qual_name":"0.rom_e2e_jtag_debug_rma.30031207228304034940893351391146820847564195660862673055807986207807583914697","seed":30031207228304034940893351391146820847564195660862673055807986207807583914697,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_jtag_debug_rma/latest/run.log","log_context":["Another command (pid=578576) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=578325) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=577743) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:img_rma_exec_disabled': no such target '//sw/device/silicon_creator/rom/e2e:img_rma_exec_disabled': target 'img_rma_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:img_rma_exec_disabled': target 'img_rma_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_jtag_inject_test_unlocked0","qual_name":"0.rom_e2e_jtag_inject_test_unlocked0.92581846225845451160121518557303480362257260642921467021321319381212020734007","seed":92581846225845451160121518557303480362257260642921467021321319381212020734007,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_jtag_inject_test_unlocked0/latest/run.log","log_context":["Another command (pid=504020) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=499433) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=503100) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_jtag_inject_dev","qual_name":"0.rom_e2e_jtag_inject_dev.103511151491670200904820148240137410898200186695347153256556354036705641199921","seed":103511151491670200904820148240137410898200186695347153256556354036705641199921,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_jtag_inject_dev/latest/run.log","log_context":["Another command (pid=528325) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=523739) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=482262) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_jtag_inject_rma","qual_name":"0.rom_e2e_jtag_inject_rma.66341132275175407840893945037348666656289211196182117991492418042772724339789","seed":66341132275175407840893945037348666656289211196182117991492418042772724339789,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_jtag_inject_rma/latest/run.log","log_context":["Another command (pid=499745) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=501418) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=502728) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:img_dev_exec_disabled': target 'img_dev_exec_disabled' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_static_critical","qual_name":"0.rom_e2e_static_critical.34632801412588002330655808228967562113750479209761641939290266664755770073196","seed":34632801412588002330655808228967562113750479209761641939290266664755770073196,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_static_critical/latest/run.log","log_context":["---- STDERR ----\n","Another command (pid=626917) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=631749) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv': no such target '//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv': target 'rom_with_fake_keys_sim_dv' not declared in package 'sw/device/silicon_creator/rom' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom:rom_with_fake_keys_sim_dv': target 'rom_with_fake_keys_sim_dv' not declared in package 'sw/device/silicon_creator/rom' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_keymgr_dpe_init_rom_ext_meas","qual_name":"0.rom_e2e_keymgr_dpe_init_rom_ext_meas.99220736952002119698843767257132744791640524018036001513950713629954011876718","seed":99220736952002119698843767257132744791640524018036001513950713629954011876718,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_keymgr_dpe_init_rom_ext_meas/latest/run.log","log_context":["Another command (pid=569008) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=570055) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=565420) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': target 'rom_e2e_keymgr_dpe_init_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': target 'rom_e2e_keymgr_dpe_init_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_keymgr_dpe_init_rom_ext_no_meas","qual_name":"0.rom_e2e_keymgr_dpe_init_rom_ext_no_meas.81792962703842959603074204641044326891968963944828224607794100918258425064391","seed":81792962703842959603074204641044326891968963944828224607794100918258425064391,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_keymgr_dpe_init_rom_ext_no_meas/latest/run.log","log_context":["Another command (pid=576794) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=578576) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=578325) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': target 'rom_e2e_keymgr_dpe_init_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': target 'rom_e2e_keymgr_dpe_init_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas","qual_name":"0.rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas.110304590386324158139821074228137775855196843874664818285231165416061674618003","seed":110304590386324158139821074228137775855196843874664818285231165416061674618003,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_keymgr_dpe_init_rom_ext_invalid_meas/latest/run.log","log_context":["Another command (pid=578325) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=572394) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=572989) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': target 'rom_e2e_keymgr_dpe_init_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:rom_e2e_keymgr_dpe_init_test_sim_dv': target 'rom_e2e_keymgr_dpe_init_test_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_test_unlocked0_otbn","qual_name":"0.rom_e2e_sigverify_mod_exp_test_unlocked0_otbn.29667794185671624605314680832448693838412978585021319046602738934240047339258","seed":29667794185671624605314680832448693838412978585021319046602738934240047339258,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_test_unlocked0_otbn/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=319242) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_test_unlocked0_sw","qual_name":"0.rom_e2e_sigverify_mod_exp_test_unlocked0_sw.64139101153696713779676918725135772098465510284115883284309537425550440340574","seed":64139101153696713779676918725135772098465510284115883284309537425550440340574,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_test_unlocked0_sw/latest/run.log","log_context":["Another command (pid=319242) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=356731) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=327000) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_dev_otbn","qual_name":"0.rom_e2e_sigverify_mod_exp_dev_otbn.5989777416519349495395467459187631587866960468849540940205810387151837151134","seed":5989777416519349495395467459187631587866960468849540940205810387151837151134,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_dev_otbn/latest/run.log","log_context":["Another command (pid=610277) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=611663) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=608508) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_dev_sw","qual_name":"0.rom_e2e_sigverify_mod_exp_dev_sw.44646016216420498208101577504502015397583560617502304113830402166961212948158","seed":44646016216420498208101577504502015397583560617502304113830402166961212948158,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_dev_sw/latest/run.log","log_context":["Another command (pid=628113) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=620762) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=613534) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_prod_otbn","qual_name":"0.rom_e2e_sigverify_mod_exp_prod_otbn.110995677500579218000892856446724731238337521929905825663481093523248029151945","seed":110995677500579218000892856446724731238337521929905825663481093523248029151945,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_prod_otbn/latest/run.log","log_context":["Another command (pid=622404) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=626816) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=617455) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_prod_sw","qual_name":"0.rom_e2e_sigverify_mod_exp_prod_sw.48169388836908326176937476302156455769420621758056588430711014292475405099144","seed":48169388836908326176937476302156455769420621758056588430711014292475405099144,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_prod_sw/latest/run.log","log_context":["Another command (pid=612215) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=631749) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=635507) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_prod_end_otbn","qual_name":"0.rom_e2e_sigverify_mod_exp_prod_end_otbn.11638006259754498799899981461196199032799184930042535280301294486855274902212","seed":11638006259754498799899981461196199032799184930042535280301294486855274902212,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_prod_end_otbn/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=611663) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_prod_end_sw","qual_name":"0.rom_e2e_sigverify_mod_exp_prod_end_sw.13743179389205621437197734869799507782399572710524697252151902765573389321687","seed":13743179389205621437197734869799507782399572710524697252151902765573389321687,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_prod_end_sw/latest/run.log","log_context":["Another command (pid=581403) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=619827) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=622404) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_rma_otbn","qual_name":"0.rom_e2e_sigverify_mod_exp_rma_otbn.27454872742864824269773405463631972792816327059540315693642097635601979243132","seed":27454872742864824269773405463631972792816327059540315693642097635601979243132,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_rma_otbn/latest/run.log","log_context":["Another command (pid=617455) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=628113) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=620762) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_sigverify_mod_exp_rma_sw","qual_name":"0.rom_e2e_sigverify_mod_exp_rma_sw.3879796880648275927727800674622914844310982432056026401731279387615312184557","seed":3879796880648275927727800674622914844310982432056026401731279387615312184557,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_sigverify_mod_exp_rma_sw/latest/run.log","log_context":["\n","---- STDERR ----\n","Another command (pid=622404) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_sigverify_mod_exp_sim_dv': target 'empty_test_sigverify_mod_exp_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_volatile_raw_unlock","qual_name":"0.rom_volatile_raw_unlock.62280102519310754524961934582985185308395763320226175244592789498269150853082","seed":62280102519310754524961934582985185308395763320226175244592789498269150853082,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_volatile_raw_unlock/latest/run.log","log_context":["Another command (pid=502298) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=500694) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=499745) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_raw_unlock","qual_name":"0.rom_raw_unlock.96446951234729126269235010975008526784590990579339898977173835538628285651843","seed":96446951234729126269235010975008526784590990579339898977173835538628285651843,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_raw_unlock/latest/run.log","log_context":["Another command (pid=381901) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=385791) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=387376) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_sim_dv': target 'empty_test_slot_a_sim_dv' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_e2e_self_hash","qual_name":"0.rom_e2e_self_hash.14586545487033624588964535997973915171129457368683422902579649027555829276521","seed":14586545487033624588964535997973915171129457368683422902579649027555829276521,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_e2e_self_hash/latest/run.log","log_context":["Another command (pid=545067) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=534573) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=529383) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_mod_exp_rma_otbn': no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_mod_exp_rma_otbn': target 'otp_img_sigverify_mod_exp_rma_otbn' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: no such target '//sw/device/silicon_creator/rom/e2e:otp_img_sigverify_mod_exp_rma_otbn': target 'otp_img_sigverify_mod_exp_rma_otbn' not declared in package 'sw/device/silicon_creator/rom/e2e' defined by /nightly/current_run/opentitan/sw/device/silicon_creator/rom/e2e/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"chip_sw_uart_smoketest_signed","qual_name":"0.chip_sw_uart_smoketest_signed.103874843681015392622371309974966564314882438672704907524922322683899492050155","seed":103874843681015392622371309974966564314882438672704907524922322683899492050155,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_uart_smoketest_signed/latest/run.log","log_context":["Another command (pid=558716) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=559645) is running. Waiting for it to complete on the server (server_pid=209140)...\n","Another command (pid=561206) is running. Waiting for it to complete on the server (server_pid=209140)...\n","WARNING: Target pattern parsing failed.\n","ERROR: Skipping '//sw/device/tests:uart_smoketest_signed_sim_dv': no such target '//sw/device/tests:uart_smoketest_signed_sim_dv': target 'uart_smoketest_signed_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: no such target '//sw/device/tests:uart_smoketest_signed_sim_dv': target 'uart_smoketest_signed_sim_dv' not declared in package 'sw/device/tests' defined by /nightly/current_run/opentitan/sw/device/tests/BUILD\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]},{"name":"rom_keymgr_dpe_functest","qual_name":"0.rom_keymgr_dpe_functest.50587473776849538510001146065646975722859241774762429389435138364093957410364","seed":50587473776849538510001146065646975722859241774762429389435138364093957410364,"line":null,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.rom_keymgr_dpe_functest/latest/run.log","log_context":["Use --verbose_failures to see the command lines of failed build steps.\n","ERROR: Analysis of target '//sw/device/silicon_creator/lib/drivers:keymgr_dpe_functest_sim_dv' failed; build aborted: Target //sw/device/silicon_creator/lib/drivers:keymgr_dpe_functest_sim_dv is incompatible and cannot be built, but was explicitly requested.\n","Dependency chain:\n","    //sw/device/silicon_creator/lib/drivers:keymgr_dpe_functest_sim_dv (f2055d)   <-- target platform (//toolchain:opentitan_platform) didn't satisfy constraint @@platforms//:incompatible\n","INFO: Elapsed time: 0.382s, Critical Path: 0.03s\n","INFO: 1 process: 1 internal.\n","ERROR: Build did NOT complete successfully\n","\n","_run_cmd -> had a non-zero return code of 1.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:58: sw_build] Error 1\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [all_escalation_resets_test_sim_dv(sw/device/lib/testing/alert_handler_testutils.c:78)] CHECK-fail: word_index < dump_size":[{"name":"chip_sw_all_escalation_resets","qual_name":"0.chip_sw_all_escalation_resets.79272188059409572070402751160965850431330678661469559904809320326849675031572","seed":79272188059409572070402751160965850431330678661469559904809320326849675031572,"line":359,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_all_escalation_resets/latest/run.log","log_context":["UVM_INFO @ 943.433000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (sec_cm_pkg.sv:48) [sec_cm_pkg::find_sec_cm_if_proxy] no proxy with path *rstmgr.u_d0_spi_host*.leaf_rst_path":[{"name":"chip_sw_rstmgr_rst_cnsty_escalation","qual_name":"0.chip_sw_rstmgr_rst_cnsty_escalation.3842580704945495220371881861445842213119537233749453073755471884760487455979","seed":3842580704945495220371881861445842213119537233749453073755471884760487455979,"line":320,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rstmgr_rst_cnsty_escalation/latest/run.log","log_context":["UVM_INFO @  10.300001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [spi_passthrough_test_sim_dv(sw/device/tests/sim_dv/spi_passthrough_test.c:382)] CHECK-fail: irq == kDtSpiDeviceIrqUploadCmdfifoNotEmpty":[{"name":"chip_sw_spi_device_pass_through_collision","qual_name":"0.chip_sw_spi_device_pass_through_collision.25492833839152071547910696753743306964515828225169811105981395139150172658645","seed":25492833839152071547910696753743306964515828225169811105981395139150172658645,"line":341,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_spi_device_pass_through_collision/latest/run.log","log_context":["UVM_INFO @ 273.046000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '(!$fell(lc_ctrl_pkg::lc_tx_test_true_strict(lc_init_done_o)))'":[{"name":"chip_sw_otp_ctrl_escalation","qual_name":"0.chip_sw_otp_ctrl_escalation.22435191368433304299697465531818385400765966882966055142934251103405896002235","seed":22435191368433304299697465531818385400765966882966055142934251103405896002235,"line":335,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otp_ctrl_escalation/latest/run.log","log_context":["UVM_ERROR @ 176.940000 us: (lc_ctrl.sv:884) [ASSERT FAILED] LcInitDoneSticky_A\n","UVM_INFO @ 176.940000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [rstmgr_alert_info_test_sim_dv(sw/device/lib/testing/alert_handler_testutils.c:78)] CHECK-fail: word_index < dump_size":[{"name":"chip_sw_rstmgr_alert_info","qual_name":"0.chip_sw_rstmgr_alert_info.34373909360860487399640274916925287101549569985890989668727232785215939080524","seed":34373909360860487399640274916925287101549569985890989668727232785215939080524,"line":349,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rstmgr_alert_info/latest/run.log","log_context":["UVM_INFO @ 331.228000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Offending '((!rstreqs[*]) && (reset_cause != HwReq))'":[{"name":"chip_sw_rstmgr_cpu_info","qual_name":"0.chip_sw_rstmgr_cpu_info.115427436960307777800537106872474610381336381432316205222991250247007081290602","seed":115427436960307777800537106872474610381336381432316205222991250247007081290602,"line":353,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rstmgr_cpu_info/latest/run.log","log_context":["UVM_ERROR @ 412.096000 us: (pwrmgr_rstreqs_sva_if.sv:55) [ASSERT FAILED] HwResetOff_A\n","UVM_INFO @ 412.096000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_clkmgr_off_aes_trans","qual_name":"0.chip_sw_clkmgr_off_aes_trans.64997397432203674772569521850191847878893735982716457557949423285857804996641","seed":64997397432203674772569521850191847878893735982716457557949423285857804996641,"line":330,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_clkmgr_off_aes_trans/latest/run.log","log_context":["UVM_ERROR @ 185.280000 us: (pwrmgr_rstreqs_sva_if.sv:55) [ASSERT FAILED] HwResetOff_A\n","UVM_INFO @ 185.280000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_clkmgr_off_hmac_trans","qual_name":"0.chip_sw_clkmgr_off_hmac_trans.115513987235037100380222685836621917691786622287912929562124449200693717814019","seed":115513987235037100380222685836621917691786622287912929562124449200693717814019,"line":330,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_clkmgr_off_hmac_trans/latest/run.log","log_context":["UVM_ERROR @ 185.280000 us: (pwrmgr_rstreqs_sva_if.sv:55) [ASSERT FAILED] HwResetOff_A\n","UVM_INFO @ 185.280000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_clkmgr_off_kmac_trans","qual_name":"0.chip_sw_clkmgr_off_kmac_trans.94356352816681568923416376151794812614773201515468371109505251116180803922952","seed":94356352816681568923416376151794812614773201515468371109505251116180803922952,"line":330,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_clkmgr_off_kmac_trans/latest/run.log","log_context":["UVM_ERROR @ 185.392000 us: (pwrmgr_rstreqs_sva_if.sv:55) [ASSERT FAILED] HwResetOff_A\n","UVM_INFO @ 185.392000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]},{"name":"chip_sw_clkmgr_off_otbn_trans","qual_name":"0.chip_sw_clkmgr_off_otbn_trans.25898531916961978253612466040084330214401243971626602775628969724148179730789","seed":25898531916961978253612466040084330214401243971626602775628969724148179730789,"line":330,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_clkmgr_off_otbn_trans/latest/run.log","log_context":["UVM_ERROR @ 185.360000 us: (pwrmgr_rstreqs_sva_if.sv:55) [ASSERT FAILED] HwResetOff_A\n","UVM_INFO @ 185.360000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_ERROR @ * us: (chip_sw_soc_proxy_smoke_vseq.sv:36) [chip_env_pkg::\\chip_sw_soc_proxy_smoke_vseq::body ] Resets did not complete within required time!":[{"name":"chip_sw_soc_proxy_smoketest","qual_name":"0.chip_sw_soc_proxy_smoketest.85847090979573102103902325750474053581816301251443244331555268556655010852862","seed":85847090979573102103902325750474053581816301251443244331555268556655010852862,"line":328,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_soc_proxy_smoketest/latest/run.log","log_context":["UVM_INFO @ 156.320000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [soc_proxy_external_wakeup_sim_dv(sw/device/tests/soc_proxy_external_wakeup.c:50)] DIF-fail: dif_pwrmgr_get_request_sources(&pwrmgr, kDifPwrmgrReqTypeWakeup, &wakeup_req_srcs) returns *":[{"name":"chip_sw_soc_proxy_external_wakeup","qual_name":"0.chip_sw_soc_proxy_external_wakeup.36997595848172668614435269897607328844601540495437334867950854274026361425406","seed":36997595848172668614435269897607328844601540495437334867950854274026361425406,"line":326,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_soc_proxy_external_wakeup/latest/run.log","log_context":["UVM_INFO @ 157.913000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [aon_timer_irq_test_sim_dv(sw/device/tests/aon_timer_irq_test.c:139)] CHECK-fail: Timer took * usec which is not in the range * usec and * usec":[{"name":"chip_sw_aon_timer_irq","qual_name":"0.chip_sw_aon_timer_irq.89972616784170951013667120781986584413577385857862128752650496055390292057860","seed":89972616784170951013667120781986584413577385857862128752650496055390292057860,"line":327,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_aon_timer_irq/latest/run.log","log_context":["UVM_INFO @ 503.397000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [aon_timer_wdog_bite_reset_test_sim_dv(sw/device/tests/aon_timer_wdog_bite_reset_test.c:84)] CHECK-fail: Wdog bark irq did not rise after * microseconds":[{"name":"chip_sw_aon_timer_wdog_bite_reset","qual_name":"0.chip_sw_aon_timer_wdog_bite_reset.55064319386687658492441367709188420562165569577962575951126055779634728026348","seed":55064319386687658492441367709188420562165569577962575951126055779634728026348,"line":328,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_aon_timer_wdog_bite_reset/latest/run.log","log_context":["UVM_INFO @ 182.604000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL @ * us: (dv_utils_pkg.sv:253) [dv_utils_pkg::sw_symbol_get_addr_size.unnamed$$_*] Check failed (ret) Failed to read line from \"kJitterEnabled.dat\"":[{"name":"chip_sw_otbn_ecdsa_op_irq_jitter_en","qual_name":"0.chip_sw_otbn_ecdsa_op_irq_jitter_en.34644159610628259489595768094825426649045804493959609601676985527983431286195","seed":34644159610628259489595768094825426649045804493959609601676985527983431286195,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otbn_ecdsa_op_irq_jitter_en/latest/run.log","log_context":["UVM_INFO @  10.380001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_aes_enc_jitter_en","qual_name":"0.chip_sw_aes_enc_jitter_en.19268443463684171597965196455011854789123276130431280907261048134212456443243","seed":19268443463684171597965196455011854789123276130431280907261048134212456443243,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_aes_enc_jitter_en/latest/run.log","log_context":["UVM_INFO @  10.400001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_hmac_enc_jitter_en","qual_name":"0.chip_sw_hmac_enc_jitter_en.66352676618723056422912695393890884755219028825738648012442360397751431871158","seed":66352676618723056422912695393890884755219028825738648012442360397751431871158,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_hmac_enc_jitter_en/latest/run.log","log_context":["UVM_INFO @  10.360001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_kmac_mode_kmac_jitter_en","qual_name":"0.chip_sw_kmac_mode_kmac_jitter_en.19761675896835236721611092393327828703447027954735148521320277503147861170447","seed":19761675896835236721611092393327828703447027954735148521320277503147861170447,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_kmac_mode_kmac_jitter_en/latest/run.log","log_context":["UVM_INFO @  10.360001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq","qual_name":"0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.30346885811820969268836030287368765271931654325519517652226789878654497003526","seed":30346885811820969268836030287368765271931654325519517652226789878654497003526,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq/latest/run.log","log_context":["UVM_INFO @  10.380001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_aes_enc_jitter_en_reduced_freq","qual_name":"0.chip_sw_aes_enc_jitter_en_reduced_freq.22508781796196515761815457767782866816301153928201529992232262892629004259393","seed":22508781796196515761815457767782866816301153928201529992232262892629004259393,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_aes_enc_jitter_en_reduced_freq/latest/run.log","log_context":["UVM_INFO @  10.140001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_hmac_enc_jitter_en_reduced_freq","qual_name":"0.chip_sw_hmac_enc_jitter_en_reduced_freq.73770469044270668180143276549387929417160791163945308998288185213259542931746","seed":73770469044270668180143276549387929417160791163945308998288185213259542931746,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_hmac_enc_jitter_en_reduced_freq/latest/run.log","log_context":["UVM_INFO @  10.320001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_kmac_mode_kmac_jitter_en_reduced_freq","qual_name":"0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.102582234608756495223659972927511074051502547605968478708530001988460875497583","seed":102582234608756495223659972927511074051502547605968478708530001988460875497583,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq/latest/run.log","log_context":["UVM_INFO @  10.140001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq","qual_name":"0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.29621560360426032639717228651608572747011308124394196669061752582571926430100","seed":29621560360426032639717228651608572747011308124394196669061752582571926430100,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq/latest/run.log","log_context":["UVM_INFO @  10.180001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_sw_csrng_edn_concurrency_reduced_freq","qual_name":"0.chip_sw_csrng_edn_concurrency_reduced_freq.106256642492747286704369382644889886061459295739018002257846004407444698364544","seed":106256642492747286704369382644889886061459295739018002257846004407444698364544,"line":319,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_csrng_edn_concurrency_reduced_freq/latest/run.log","log_context":["UVM_INFO @  10.320001 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [rv_core_ibex_nmi_irq_test_sim_dv(sw/device/tests/rv_core_ibex_nmi_irq_test.c:172)] CHECK-fail: Timed out after * usec (* CPU cycles) waiting for nmi_fired":[{"name":"chip_sw_rv_core_ibex_nmi_irq","qual_name":"0.chip_sw_rv_core_ibex_nmi_irq.79870313573845167676757038949697626501551224908586102679437935897408189440366","seed":79870313573845167676757038949697626501551224908586102679437935897408189440366,"line":329,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_rv_core_ibex_nmi_irq/latest/run.log","log_context":["UVM_INFO @ 269.301000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (cip_base_scoreboard.sv:689) scoreboard [scoreboard] On interface chip_soc_mbx_reg_block, item had unexpected d_error value(predicted *, but saw *).":[{"name":"chip_tl_errors","qual_name":"0.chip_tl_errors.105099306832705172708552981090409673798587397359854000420138032134740887257002","seed":105099306832705172708552981090409673798587397359854000420138032134740887257002,"line":238,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_tl_errors/latest/run.log","log_context":[" TL item was: req: (cip_tl_seq_item@31524) { a_addr: 'h1465510  a_data: 'hcd0b6119  a_mask: 'ha  a_size: 'h2  a_param: 'h0  a_source: 'ha1  a_opcode: 'h1  a_user: 'h27719  d_param: 'h0  d_source: 'ha1  d_data: 'h0  d_size: 'h2  d_opcode: 'h0  d_error: 'h0  d_sink: 'h0  d_user: 'h1caa  a_valid_delay: 'h0  d_valid_delay: 'h0  a_valid_len: 'h0  d_valid_len: 'h0  req_abort_after_a_valid_len: 'h0  rsp_abort_after_d_valid_len: 'h0  req_completed: 'h0  rsp_completed: 'h0  tl_intg_err_type: TlIntgErrNone  max_ecc_errors: 'h3  } \n"," Reasons for predicted error: '{\"Unsupported partial write\"} .\n","UVM_INFO @ 118.075000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n"]}],"UVM_ERROR @ * us: (jtag_riscv_driver.sv:221) [jtag_riscv_agent_pkg] Check failed sbcs_val[SbAccess32] == * (* [*] vs * [*]) expect SBA width to be * bits!":[{"name":"chip_jtag_csr_rw","qual_name":"0.chip_jtag_csr_rw.37924471064360614983077544362459742089317661688489460896835833228724925399676","seed":37924471064360614983077544362459742089317661688489460896835833228724925399676,"line":5963,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_jtag_csr_rw/latest/run.log","log_context":["UVM_INFO @ 131.615000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"chip_jtag_mem_access","qual_name":"0.chip_jtag_mem_access.34609726001447964374446965563638783779587970183081650632378443228853597050565","seed":34609726001447964374446965563638783779587970183081650632378443228853597050565,"line":5963,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_jtag_mem_access/latest/run.log","log_context":["UVM_INFO @ 132.542000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR @ * us: (cip_base_vseq.sv:660) [chip_rv_dm_lc_disabled_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch":[{"name":"chip_rv_dm_lc_disabled","qual_name":"0.chip_rv_dm_lc_disabled.45347669463629145669990653179626578454156337771196620347410735100130658021836","seed":45347669463629145669990653179626578454156337771196620347410735100130658021836,"line":248,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_rv_dm_lc_disabled/latest/run.log","log_context":["UVM_INFO @ 504.759000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Error-[CNST-CIF] Constraints inconsistency failure":[{"name":"chip_padctrl_attributes","qual_name":"0.chip_padctrl_attributes.70303852740894567226930372813054499685232101952268667711122890186230971378767","seed":70303852740894567226930372813054499685232101952268667711122890186230971378767,"line":288,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_padctrl_attributes/latest/run.log","log_context":["src/lowrisc_dv_dv_lib_0/dv_base_test.sv, 143\n","  Constraints are inconsistent and cannot be solved.\n","  Please check the inconsistent constraints being printed above and rewrite \n","  them.\n"]}],"UVM_ERROR @ * us: (sw_logger_if.sv:526) [dma_abort_sim_dv(sw/device/tests/dma_abort.c:77)] CHECK-fail: Timed out after * usec (* CPU cycles) waiting for kSoftwareBarrier == *":[{"name":"chip_sw_dma_abort","qual_name":"0.chip_sw_dma_abort.66619863408890974169540682762189776776006087996954343938496800103502092219001","seed":66619863408890974169540682762189776776006087996954343938496800103502092219001,"line":332,"log_path":"/nightly/current_run/scratch/master/chip_darjeeling_asic-sim-vcs/0.chip_sw_dma_abort/latest/run.log","log_context":["UVM_INFO @ 211.731000 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":84,"total":238,"percent":35.294117647058826}