{"block":{"name":"i2c","variant":null,"commit":"119f86a224419c5317ef7158da5bd89a3631f772","commit_short":"119f86a","dirty":true,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/119f86a224419c5317ef7158da5bd89a3631f772","revision_info":"GitHub Revision: [`119f86a`](https://github.com/lowrisc/opentitan/tree/119f86a224419c5317ef7158da5bd89a3631f772)"},"tool":{"name":"xcelium","version":"24.03-s007"},"timestamp":"2026-09-03T16:40:21Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/i2c/data/i2c_testplan.html","stages":{"V1":{"testpoints":{"host_smoke":{"tests":{"i2c_host_smoke":{"max_time":519.0,"sim_time":2051.95454,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_smoke":{"tests":{"i2c_target_smoke":{"max_time":16.0,"sim_time":2491.43795,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"i2c_csr_hw_reset":{"max_time":3.0,"sim_time":57.430387,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"i2c_csr_rw":{"max_time":2.0,"sim_time":53.079858,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"i2c_csr_bit_bash":{"max_time":6.0,"sim_time":396.517764,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"i2c_csr_aliasing":{"max_time":2.0,"sim_time":28.864527,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"i2c_csr_mem_rw_with_rand_reset":{"max_time":3.0,"sim_time":117.636136,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"i2c_csr_rw":{"max_time":2.0,"sim_time":53.079858,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":2.0,"sim_time":28.864527,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":7,"total":7,"percent":100.0},"V2":{"testpoints":{"host_error_intr":{"tests":{"i2c_host_error_intr":{"max_time":4.0,"sim_time":293.57327899999996,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_stress_all":{"tests":{"i2c_host_stress_all":{"max_time":158.0,"sim_time":10102.27672,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_maxperf":{"tests":{"i2c_host_perf":{"max_time":3601.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_override":{"tests":{"i2c_host_override":{"max_time":2.0,"sim_time":27.943904999999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_watermark":{"tests":{"i2c_host_fifo_watermark":{"max_time":3602.1836732830848,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_fifo_overflow":{"tests":{"i2c_host_fifo_overflow":{"max_time":702.0,"sim_time":12219.548205000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_reset":{"tests":{"i2c_host_fifo_reset_fmt":{"max_time":3.0,"sim_time":534.8465649999999,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_fmt_empty":{"max_time":6.0,"sim_time":1125.081751,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_rx":{"max_time":6.0,"sim_time":1693.8473319999998,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_fifo_full":{"tests":{"i2c_host_fifo_full":{"max_time":896.0,"sim_time":4488.7126100000005,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_timeout":{"tests":{"i2c_host_stretch_timeout":{"max_time":13.0,"sim_time":752.0775239999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"i2c_host_mode_toggle":{"tests":{"i2c_host_mode_toggle":{"max_time":2.0,"sim_time":105.412836,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_glitch":{"tests":{"i2c_target_glitch":{"max_time":4.0,"sim_time":1889.87894,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all":{"tests":{"i2c_target_stress_all":{"max_time":3600.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_maxperf":{"tests":{"i2c_target_perf":{"max_time":8.0,"sim_time":1341.076862,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_empty":{"tests":{"i2c_target_stress_rd":{"max_time":51.0,"sim_time":13257.051899,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_smoke":{"max_time":6.0,"sim_time":1891.049986,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_reset":{"tests":{"i2c_target_fifo_reset_acq":{"max_time":3.0,"sim_time":628.364422,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_reset_tx":{"max_time":3.0,"sim_time":272.350637,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_full":{"tests":{"i2c_target_stress_wr":{"max_time":3600.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"i2c_target_stress_rd":{"max_time":51.0,"sim_time":13257.051899,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_stress_wr":{"max_time":3601.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":3,"percent":33.333333333333336},"target_timeout":{"tests":{"i2c_target_timeout":{"max_time":8.0,"sim_time":1292.862924,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_clock_stretch":{"tests":{"i2c_target_stretch":{"max_time":10.0,"sim_time":3151.333709,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"bad_address":{"tests":{"i2c_target_bad_addr":{"max_time":5.0,"sim_time":853.362169,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_glitch":{"tests":{"i2c_target_hrst":{"max_time":4.0,"sim_time":1389.287702,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_watermark":{"tests":{"i2c_target_fifo_watermarks_acq":{"max_time":3.0,"sim_time":208.87019899999999,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_tx":{"max_time":2.0,"sim_time":148.426646,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_config_perf":{"tests":{"i2c_host_perf":{"max_time":3601.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"i2c_host_perf_precise":{"max_time":1037.0,"sim_time":6165.471119,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":2,"percent":50.0},"host_mode_clock_stretching":{"tests":{"i2c_host_stretch_timeout":{"max_time":13.0,"sim_time":752.0775239999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_tx_stretch_ctrl":{"tests":{"i2c_target_tx_stretch_ctrl":{"max_time":3.0,"sim_time":58.455002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_nack_generation":{"tests":{"i2c_target_nack_acqfull":{"max_time":4.0,"sim_time":440.70468,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull_addr":{"max_time":4.0,"sim_time":2104.8815520000003,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_txstretch":{"max_time":3.0,"sim_time":978.833619,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_mode_halt_on_nak":{"tests":{"i2c_host_may_nack":{"max_time":8.0,"sim_time":1478.42956,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_smbus_maxlen":{"tests":{"i2c_target_smbus_maxlen":{"max_time":4.0,"sim_time":2590.785793,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"i2c_alert_test":{"max_time":1.0,"sim_time":27.102052,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"i2c_intr_test":{"max_time":2.0,"sim_time":120.644821,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"i2c_tl_errors":{"max_time":3.0,"sim_time":408.777911,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"i2c_tl_errors":{"max_time":3.0,"sim_time":408.777911,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"i2c_csr_hw_reset":{"max_time":3.0,"sim_time":57.430387,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":2.0,"sim_time":53.079858,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":2.0,"sim_time":28.864527,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":2.0,"sim_time":101.314844,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"i2c_csr_hw_reset":{"max_time":3.0,"sim_time":57.430387,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":2.0,"sim_time":53.079858,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":2.0,"sim_time":28.864527,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":2.0,"sim_time":101.314844,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":33,"total":41,"percent":80.48780487804878},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"i2c_tl_intg_err":{"max_time":2.0,"sim_time":75.207104,"passed":1,"total":1,"percent":100.0},"i2c_sec_cm":{"max_time":2.0,"sim_time":132.414155,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"i2c_tl_intg_err":{"max_time":2.0,"sim_time":75.207104,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"host_stress_all_with_rand_reset":{"tests":{"i2c_host_stress_all_with_rand_reset":{"max_time":14.0,"sim_time":1297.6213759999998,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_error_intr":{"tests":{"i2c_target_unexp_stop":{"max_time":3.0,"sim_time":870.416884,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all_with_rand_reset":{"tests":{"i2c_target_stress_all_with_rand_reset":{"max_time":8.0,"sim_time":172.673082,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0}},"coverage":{"code":{"block":96.14,"line_statement":95.59,"branch":93.09,"condition_expression":null,"toggle":72.35,"fsm":84.17},"assertion":97.46,"functional":80.23},"cov_report_page":"/nightly/current_run/scratch/master/i2c-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"Job timed out after * minutes":[{"name":"i2c_host_fifo_watermark","qual_name":"0.i2c_host_fifo_watermark.65222940783231432594907653494010182390719883392128700210998088147962893941002","seed":65222940783231432594907653494010182390719883392128700210998088147962893941002,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_fifo_watermark/latest/run.log","log_context":[]},{"name":"i2c_host_perf","qual_name":"0.i2c_host_perf.104360982163752100326436293752223913699579424734560427626174080289391217960086","seed":104360982163752100326436293752223913699579424734560427626174080289391217960086,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_perf/latest/run.log","log_context":[]},{"name":"i2c_target_stress_wr","qual_name":"0.i2c_target_stress_wr.46763322733924356601323686897128982246177771890660322297580363848416449751475","seed":46763322733924356601323686897128982246177771890660322297580363848416449751475,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_wr/latest/run.log","log_context":[]},{"name":"i2c_target_intr_stress_wr","qual_name":"0.i2c_target_intr_stress_wr.46751368716213667107166183676040503552796380039078852590136897438007889712573","seed":46751368716213667107166183676040503552796380039078852590136897438007889712573,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_intr_stress_wr/latest/run.log","log_context":[]},{"name":"i2c_target_stress_all","qual_name":"0.i2c_target_stress_all.84510770516598473398166953612821659509332321422232209129333644151145030413789","seed":84510770516598473398166953612821659509332321422232209129333644151145030413789,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_all/latest/run.log","log_context":[]}],"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_host_error_intr","qual_name":"0.i2c_host_error_intr.80103050013393370578111870327757740675414290958916814417227183052193152949878","seed":80103050013393370578111870327757740675414290958916814417227183052193152949878,"line":97,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_error_intr/latest/run.log","log_context":["UVM_INFO @ 293573279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (csr_utils_pkg.sv:623) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.fmtfull (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=312)":[{"name":"i2c_host_stress_all","qual_name":"0.i2c_host_stress_all.12694309387379582994504162873365148628522445171813956639081486547503887403920","seed":12694309387379582994504162873365148628522445171813956639081486547503887403920,"line":158,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_stress_all/latest/run.log","log_context":["UVM_INFO @ 10102276720 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.98463294462483101638706984821990225012117127370131798410557761425123345673904","seed":98463294462483101638706984821990225012117127370131798410557761425123345673904,"line":93,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_glitch/latest/run.log","log_context":["UVM_INFO @ 1889878940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (i2c_scoreboard.sv:680) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.36775802174490936268313805066203013342301270415775115120767878529464660618179","seed":36775802174490936268313805066203013342301270415775115120767878529464660618179,"line":87,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_INFO @ 870416884 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1297) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.112283818480686402146706941060917407657963601479629560651321615038697569087983","seed":112283818480686402146706941060917407657963601479629560651321615038697569087983,"line":96,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1297621376 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1210) [i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.":[{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.75592899594380635659956563263850820951594676717747748115903253283168299953981","seed":75592899594380635659956563263850820951594676717747748115903253283168299953981,"line":93,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 172673082 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":39,"total":50,"percent":78.0}