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otp_ctrl_core_reg_block.err_code_*":[{"name":"otp_ctrl_background_chks","qual_name":"0.otp_ctrl_background_chks.7295135938483264420698835901086157615479591603379998701579974304481374636167","seed":7295135938483264420698835901086157615479591603379998701579974304481374636167,"line":816,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_background_chks/latest/run.log","log_context":["UVM_INFO @ 197116731 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_parallel_lc_esc","qual_name":"0.otp_ctrl_parallel_lc_esc.75603903330878602801172724611488609602104078318111821780505709993183656692726","seed":75603903330878602801172724611488609602104078318111821780505709993183656692726,"line":838,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_parallel_lc_esc/latest/run.log","log_context":["UVM_INFO @  98872450 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"otp_ctrl_parallel_key_req","qual_name":"0.otp_ctrl_parallel_key_req.58995084873973376774657633307199481974428610884072117905043463221047097968482","seed":58995084873973376774657633307199481974428610884072117905043463221047097968482,"line":1390,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_parallel_key_req/latest/run.log","log_context":["UVM_INFO @ 122950085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:419) scoreboard [scoreboard] Waited * cycles but did not see alert fatal_check_error. (Max wait calculated ALERT_B2B_DELAY + max_delay + * = * + * + *)":[{"name":"otp_ctrl_dai_errs","qual_name":"0.otp_ctrl_dai_errs.19200177352645656387115047861026458536112249826988398602634319728015081556043","seed":19200177352645656387115047861026458536112249826988398602634319728015081556043,"line":11004,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_dai_errs/latest/run.log","log_context":["UVM_INFO @ 765096469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:1323) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_*":[{"name":"otp_ctrl_check_fail","qual_name":"0.otp_ctrl_check_fail.70420289472437830171732961472561588821135728157945342899405173186663503878729","seed":70420289472437830171732961472561588821135728157945342899405173186663503878729,"line":1016,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_check_fail/latest/run.log","log_context":["UVM_INFO @ 143772538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (otp_ctrl_scoreboard.sv:2202) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *":[{"name":"otp_ctrl_stress_all_with_rand_reset","qual_name":"0.otp_ctrl_stress_all_with_rand_reset.27559385637468592802599497153459501261348080327487346206195011480319301619841","seed":27559385637468592802599497153459501261348080327487346206195011480319301619841,"line":25078,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1713985683 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1057) virtual_sequencer [otp_ctrl_common_vseq] Expected alert (fatal_bus_integ_error) did not fire in * cycles.":[{"name":"otp_ctrl_tl_intg_err","qual_name":"0.otp_ctrl_tl_intg_err.115164691515179857113808409188695238294418035684193309545642493603777838877748","seed":115164691515179857113808409188695238294418035684193309545642493603777838877748,"line":223,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_tl_intg_err/latest/run.log","log_context":["UVM_INFO @ 1146062668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_scoreboard.sv:786) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = *":[{"name":"otp_ctrl_csr_mem_rw_with_rand_reset","qual_name":"0.otp_ctrl_csr_mem_rw_with_rand_reset.6157770544631271860728869832358772421474212233876647914700623148738432483093","seed":6157770544631271860728869832358772421474212233876647914700623148738432483093,"line":97,"log_path":"/nightly/current_run/scratch/master/otp_ctrl-sim-vcs/0.otp_ctrl_csr_mem_rw_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  62563098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":18,"total":30,"percent":60.0}