{"block":{"name":"i2c","variant":null,"commit":"1133189211c3cf8610a02b5fd9ce5de7c2629a09","commit_short":"1133189","dirty":true,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/1133189211c3cf8610a02b5fd9ce5de7c2629a09","revision_info":"GitHub Revision: [`1133189`](https://github.com/lowrisc/opentitan/tree/1133189211c3cf8610a02b5fd9ce5de7c2629a09)"},"tool":{"name":"xcelium","version":"24.03-s007"},"timestamp":"2026-09-10T15:31:28Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/i2c/data/i2c_testplan.html","stages":{"V1":{"testpoints":{"host_smoke":{"tests":{"i2c_host_smoke":{"max_time":142.0,"sim_time":1365.281493,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_smoke":{"tests":{"i2c_target_smoke":{"max_time":13.0,"sim_time":1826.190112,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"i2c_csr_hw_reset":{"max_time":1.0,"sim_time":26.430861,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"i2c_csr_rw":{"max_time":2.0,"sim_time":17.046004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"i2c_csr_bit_bash":{"max_time":8.0,"sim_time":2542.8071630000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"i2c_csr_aliasing":{"max_time":2.0,"sim_time":69.365475,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"i2c_csr_mem_rw_with_rand_reset":{"max_time":2.0,"sim_time":65.611908,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"i2c_csr_rw":{"max_time":2.0,"sim_time":17.046004,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":2.0,"sim_time":69.365475,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":7,"total":7,"percent":100.0},"V2":{"testpoints":{"host_error_intr":{"tests":{"i2c_host_error_intr":{"max_time":1.0,"sim_time":5.70228,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_stress_all":{"tests":{"i2c_host_stress_all":{"max_time":3601.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_maxperf":{"tests":{"i2c_host_perf":{"max_time":2117.0,"sim_time":32088.42826,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_override":{"tests":{"i2c_host_override":{"max_time":1.0,"sim_time":17.426012,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_watermark":{"tests":{"i2c_host_fifo_watermark":{"max_time":3373.0,"sim_time":12334.258838,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_overflow":{"tests":{"i2c_host_fifo_overflow":{"max_time":1861.0,"sim_time":3118.73471,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_reset":{"tests":{"i2c_host_fifo_reset_fmt":{"max_time":3.0,"sim_time":381.19038900000004,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_fmt_empty":{"max_time":106.0,"sim_time":454.968489,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_rx":{"max_time":4.0,"sim_time":295.184935,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_fifo_full":{"tests":{"i2c_host_fifo_full":{"max_time":127.0,"sim_time":15848.348718000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_timeout":{"tests":{"i2c_host_stretch_timeout":{"max_time":12.0,"sim_time":2886.088925,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"i2c_host_mode_toggle":{"tests":{"i2c_host_mode_toggle":{"max_time":1.0,"sim_time":14.205316999999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_glitch":{"tests":{"i2c_target_glitch":{"max_time":5.0,"sim_time":688.931748,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all":{"tests":{"i2c_target_stress_all":{"max_time":2815.0,"sim_time":21940.633116999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_maxperf":{"tests":{"i2c_target_perf":{"max_time":7.0,"sim_time":687.286119,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_empty":{"tests":{"i2c_target_stress_rd":{"max_time":15.0,"sim_time":1611.370349,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_smoke":{"max_time":9.0,"sim_time":4131.385632,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_reset":{"tests":{"i2c_target_fifo_reset_acq":{"max_time":3.0,"sim_time":467.799552,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_reset_tx":{"max_time":3.0,"sim_time":470.597863,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_full":{"tests":{"i2c_target_stress_wr":{"max_time":3600.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0},"i2c_target_stress_rd":{"max_time":15.0,"sim_time":1611.370349,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_stress_wr":{"max_time":3601.0,"sim_time":0.0,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":3,"percent":33.333333333333336},"target_timeout":{"tests":{"i2c_target_timeout":{"max_time":9.0,"sim_time":12114.041223999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_clock_stretch":{"tests":{"i2c_target_stretch":{"max_time":194.0,"sim_time":3859.885155,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"bad_address":{"tests":{"i2c_target_bad_addr":{"max_time":10.0,"sim_time":4590.973126,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_glitch":{"tests":{"i2c_target_hrst":{"max_time":17.0,"sim_time":10668.126239,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_fifo_watermark":{"tests":{"i2c_target_fifo_watermarks_acq":{"max_time":3.0,"sim_time":390.979588,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_tx":{"max_time":3.0,"sim_time":276.486284,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_config_perf":{"tests":{"i2c_host_perf":{"max_time":2117.0,"sim_time":32088.42826,"passed":1,"total":1,"percent":100.0},"i2c_host_perf_precise":{"max_time":9.0,"sim_time":244.29865900000001,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_clock_stretching":{"tests":{"i2c_host_stretch_timeout":{"max_time":12.0,"sim_time":2886.088925,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_tx_stretch_ctrl":{"tests":{"i2c_target_tx_stretch_ctrl":{"max_time":3.0,"sim_time":51.33831,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_nack_generation":{"tests":{"i2c_target_nack_acqfull":{"max_time":4.0,"sim_time":503.67911,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull_addr":{"max_time":5.0,"sim_time":2774.016429,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_txstretch":{"max_time":3.0,"sim_time":158.844137,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_mode_halt_on_nak":{"tests":{"i2c_host_may_nack":{"max_time":8.0,"sim_time":943.4556230000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_smbus_maxlen":{"tests":{"i2c_target_smbus_maxlen":{"max_time":4.0,"sim_time":1019.060968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"i2c_alert_test":{"max_time":2.0,"sim_time":38.033646,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"i2c_intr_test":{"max_time":1.0,"sim_time":28.256776000000002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"i2c_tl_errors":{"max_time":2.0,"sim_time":246.065473,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"i2c_tl_errors":{"max_time":2.0,"sim_time":246.065473,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"i2c_csr_hw_reset":{"max_time":1.0,"sim_time":26.430861,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":2.0,"sim_time":17.046004,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":2.0,"sim_time":69.365475,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":2.0,"sim_time":29.887143000000002,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"i2c_csr_hw_reset":{"max_time":1.0,"sim_time":26.430861,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":2.0,"sim_time":17.046004,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":2.0,"sim_time":69.365475,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":2.0,"sim_time":29.887143000000002,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":34,"total":41,"percent":82.92682926829268},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"i2c_tl_intg_err":{"max_time":2.0,"sim_time":56.92871,"passed":1,"total":1,"percent":100.0},"i2c_sec_cm":{"max_time":2.0,"sim_time":42.124581,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"i2c_tl_intg_err":{"max_time":2.0,"sim_time":56.92871,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"host_stress_all_with_rand_reset":{"tests":{"i2c_host_stress_all_with_rand_reset":{"max_time":23.0,"sim_time":1241.143534,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_error_intr":{"tests":{"i2c_target_unexp_stop":{"max_time":3.0,"sim_time":706.525772,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all_with_rand_reset":{"tests":{"i2c_target_stress_all_with_rand_reset":{"max_time":2.0,"sim_time":22.034149000000003,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0}},"coverage":{"code":{"block":95.9,"line_statement":95.23,"branch":92.63,"condition_expression":null,"toggle":72.52,"fsm":82.01},"assertion":97.25,"functional":81.88},"cov_report_page":"/nightly/current_run/scratch/master/i2c-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_host_error_intr","qual_name":"0.i2c_host_error_intr.76105169963580801140150617828176839739939601370382835206146207015338048955317","seed":76105169963580801140150617828176839739939601370382835206146207015338048955317,"line":89,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_error_intr/latest/run.log","log_context":["UVM_INFO @   5702280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.4131986683498960934394506129031730556044290105525543611293288023470480940342","seed":4131986683498960934394506129031730556044290105525543611293288023470480940342,"line":94,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @  22034149 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Job timed out after * minutes":[{"name":"i2c_host_stress_all","qual_name":"0.i2c_host_stress_all.6372185763261481227329032264085180182424973643279182864791271028805027226302","seed":6372185763261481227329032264085180182424973643279182864791271028805027226302,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_stress_all/latest/run.log","log_context":[]},{"name":"i2c_target_stress_wr","qual_name":"0.i2c_target_stress_wr.73778076307965630256286695622740890553478392858619084722634675799648421138394","seed":73778076307965630256286695622740890553478392858619084722634675799648421138394,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_stress_wr/latest/run.log","log_context":[]},{"name":"i2c_target_intr_stress_wr","qual_name":"0.i2c_target_intr_stress_wr.70111910985710521551419643811719958218639778145053187546887287502433632625318","seed":70111910985710521551419643811719958218639778145053187546887287502433632625318,"line":null,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_intr_stress_wr/latest/run.log","log_context":[]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.17274686568026791996547053386891182617283549027950259839776543648707938601398","seed":17274686568026791996547053386891182617283549027950259839776543648707938601398,"line":93,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_glitch/latest/run.log","log_context":["UVM_INFO @ 688931748 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/i2c-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_i2c_*/rtl/i2c_fifos.sv,320): Assertion TxWriteStableBeforeHandshake_A has failed (* cycles, starting * PS)":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.18099683828332473287637510595133915310513762201910046831550583107583773318972","seed":18099683828332473287637510595133915310513762201910046831550583107583773318972,"line":89,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_ERROR @ 706525772 ps: (i2c_fifos.sv:320) [ASSERT FAILED] TxWriteStableBeforeHandshake_A\n","UVM_INFO @ 706525772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}],"UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!":[{"name":"i2c_target_hrst","qual_name":"0.i2c_target_hrst.51512178907478455416131221714980889368705055385268673445661993958392070614092","seed":51512178907478455416131221714980889368705055385268673445661993958392070614092,"line":88,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_target_hrst/latest/run.log","log_context":["UVM_INFO @ 10668126239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1297) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.22542736752225556088774847894649127872949471871393950175398292006563990311384","seed":22542736752225556088774847894649127872949471871393950175398292006563990311384,"line":98,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1241143534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead":[{"name":"i2c_host_mode_toggle","qual_name":"0.i2c_host_mode_toggle.67184856984159035601784570604561696737241241484870775352606809292349755462005","seed":67184856984159035601784570604561696737241241484870775352606809292349755462005,"line":96,"log_path":"/nightly/current_run/scratch/master/i2c-sim-xcelium/0.i2c_host_mode_toggle/latest/run.log","log_context":["--> EXP:\n","---------------------------------------------------\n","Name            Type                Size  Value    \n","---------------------------------------------------\n"]}]}},"passed":40,"total":50,"percent":80.0}