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resolved to a hdl object (vlog,vhdl,vlog-slice)\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:28) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.113598921630892276264747859585136745238077142200682663268092273174611098634810","seed":113598921630892276264747859585136745238077142200682663268092273174611098634810,"line":85,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-xcelium/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   3669966 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x3af [1110101111] vs 0x0 [0]) \n","UVM_ERROR @   3729966 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x175 [101110101] vs 0x0 [0]) \n","UVM_ERROR @   3820966 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x14b [101001011] vs 0x0 [0]) \n","UVM_ERROR @   3869966 ps: (spi_device_ram_cfg_vseq.sv:28) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x1ec [111101100] vs 0x0 [0]) \n"]}]}},"passed":31,"total":33,"percent":93.93939393939394}