{"block":{"name":"clkmgr","variant":null,"commit":"18abe523b2dd8071ed42b7b6cd05a84d0d428964","commit_short":"18abe52","dirty":true,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/18abe523b2dd8071ed42b7b6cd05a84d0d428964","revision_info":"GitHub Revision: [`18abe52`](https://github.com/lowrisc/opentitan/tree/18abe523b2dd8071ed42b7b6cd05a84d0d428964)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-09-17T15:31:44Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/top_darjeeling/ip_autogen/clkmgr/data/clkmgr_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"clkmgr_smoke":{"max_time":1.61,"sim_time":36.183392,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"clkmgr_csr_hw_reset":{"max_time":0.88,"sim_time":23.360329,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"clkmgr_csr_bit_bash":{"max_time":2.96,"sim_time":170.024129,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"csr_aliasing":{"tests":{"clkmgr_csr_aliasing":{"max_time":0.88,"sim_time":15.834529,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"clkmgr_csr_mem_rw_with_rand_reset":{"max_time":1.17,"sim_time":28.036684,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_aliasing":{"max_time":0.88,"sim_time":15.834529,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":5,"total":6,"percent":83.33333333333333},"V2":{"testpoints":{"peri_enables":{"tests":{"clkmgr_peri":{"max_time":1.58,"sim_time":43.386565000000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"trans_enables":{"tests":{"clkmgr_trans":{"max_time":1.22,"sim_time":26.211346000000002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"clk_status":{"tests":{"clkmgr_clk_status":{"max_time":0.9,"sim_time":13.352125,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"jitter":{"tests":{"clkmgr_smoke":{"max_time":1.61,"sim_time":36.183392,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"frequency":{"tests":{"clkmgr_frequency":{"max_time":0.83,"sim_time":6.531293,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"frequency_timeout":{"tests":{"clkmgr_frequency_timeout":{"max_time":0.96,"sim_time":5.84444,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"frequency_overflow":{"tests":{"clkmgr_frequency":{"max_time":0.83,"sim_time":6.531293,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"stress_all":{"tests":{"clkmgr_stress_all":{"max_time":0.77,"sim_time":4.487399,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"alert_test":{"tests":{"clkmgr_alert_test":{"max_time":1.0,"sim_time":27.865942,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"clkmgr_tl_errors":{"max_time":1.82,"sim_time":36.945217,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"clkmgr_tl_errors":{"max_time":1.82,"sim_time":36.945217,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"clkmgr_csr_hw_reset":{"max_time":0.88,"sim_time":23.360329,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_aliasing":{"max_time":0.88,"sim_time":15.834529,"passed":1,"total":1,"percent":100.0},"clkmgr_same_csr_outstanding":{"max_time":1.02,"sim_time":9.810006999999999,"passed":0,"total":1,"percent":0.0}},"passed":3,"total":4,"percent":75.0},"tl_d_partial_access":{"tests":{"clkmgr_csr_hw_reset":{"max_time":0.88,"sim_time":23.360329,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0},"clkmgr_csr_aliasing":{"max_time":0.88,"sim_time":15.834529,"passed":1,"total":1,"percent":100.0},"clkmgr_same_csr_outstanding":{"max_time":1.02,"sim_time":9.810006999999999,"passed":0,"total":1,"percent":0.0}},"passed":3,"total":4,"percent":75.0}},"passed":9,"total":13,"percent":69.23076923076923},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"clkmgr_sec_cm":{"max_time":6.15,"sim_time":486.198253,"passed":1,"total":1,"percent":100.0},"clkmgr_tl_intg_err":{"max_time":0.99,"sim_time":8.490383,"passed":0,"total":1,"percent":0.0}},"passed":1,"total":2,"percent":50.0},"shadow_reg_update_error":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":2.64,"sim_time":106.32213899999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadow_reg_read_clear_staged_value":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":2.64,"sim_time":106.32213899999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadow_reg_storage_error":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":2.64,"sim_time":106.32213899999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadowed_reset_glitch":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":2.64,"sim_time":106.32213899999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"shadow_reg_update_error_with_csr_rw":{"tests":{"clkmgr_shadow_reg_errors_with_csr_rw":{"max_time":0.93,"sim_time":7.133881000000001,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_bus_integrity":{"tests":{"clkmgr_tl_intg_err":{"max_time":0.99,"sim_time":8.490383,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_meas_clk_bkgn_chk":{"tests":{"clkmgr_frequency":{"max_time":0.83,"sim_time":6.531293,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_timeout_clk_bkgn_chk":{"tests":{"clkmgr_frequency_timeout":{"max_time":0.96,"sim_time":5.84444,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"sec_cm_meas_config_shadow":{"tests":{"clkmgr_shadow_reg_errors":{"max_time":2.64,"sim_time":106.32213899999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_idle_intersig_mubi":{"tests":{"clkmgr_idle_intersig_mubi":{"max_time":2.82,"sim_time":121.56429,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_jitter_config_mubi":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_idle_ctr_redun":{"tests":{"clkmgr_sec_cm":{"max_time":6.15,"sim_time":486.198253,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_meas_config_regwen":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_clk_ctrl_config_regwen":{"tests":{"clkmgr_csr_rw":{"max_time":1.15,"sim_time":53.066285,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"prim_count_check":{"tests":{"clkmgr_sec_cm":{"max_time":6.15,"sim_time":486.198253,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":4,"total":8,"percent":50.0},"V3":{"testpoints":{"regwen":{"tests":{"clkmgr_regwen":{"max_time":0.8,"sim_time":8.587913,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"stress_all_with_rand_reset":{"tests":{"clkmgr_stress_all_with_rand_reset":{"max_time":4.48,"sim_time":128.87974499999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":2,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":82.27,"branch":87.53,"condition_expression":77.56,"toggle":98.68,"fsm":0.0},"assertion":89.46,"functional":65.04},"cov_report_page":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected *b*, got *b*":[{"name":"clkmgr_frequency","qual_name":"0.clkmgr_frequency.102183570157248671382411324481421267257406465765249302468256805167328146264140","seed":102183570157248671382411324481421267257406465765249302468256805167328146264140,"line":82,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_frequency/latest/run.log","log_context":["UVM_INFO @   6531293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected *b*, got *b*":[{"name":"clkmgr_frequency_timeout","qual_name":"0.clkmgr_frequency_timeout.68035471412462149541509148011243641280882572820962164007553283528233202251565","seed":68035471412462149541509148011243641280882572820962164007553283528233202251565,"line":84,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_frequency_timeout/latest/run.log","log_context":["UVM_INFO @   5844440 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_stress_all_with_rand_reset","qual_name":"0.clkmgr_stress_all_with_rand_reset.5078796681122752706805699519216413575511063276358738000080471208065734351127","seed":5078796681122752706805699519216413575511063276358738000080471208065734351127,"line":245,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 128879745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_stress_all","qual_name":"0.clkmgr_stress_all.39802786765680851056672749676241368139996409589626865791110507235637868605005","seed":39802786765680851056672749676241368139996409589626865791110507235637868605005,"line":84,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_stress_all/latest/run.log","log_context":["UVM_INFO @   4487399 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (clkmgr_scoreboard.sv:254) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: clkmgr_reg_block.io_meas_ctrl_shadowed":[{"name":"clkmgr_regwen","qual_name":"0.clkmgr_regwen.114079736503708447176114825445548167524765359913473840646281046897935066219232","seed":114079736503708447176114825445548167524765359913473840646281046897935066219232,"line":80,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_regwen/latest/run.log","log_context":["UVM_INFO @   8587913 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: *":[{"name":"clkmgr_shadow_reg_errors_with_csr_rw","qual_name":"0.clkmgr_shadow_reg_errors_with_csr_rw.94658793503874222837628505399979015065405166488228797605741075179840640826213","seed":94658793503874222837628505399979015065405166488228797605741075179840640826213,"line":81,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_shadow_reg_errors_with_csr_rw/latest/run.log","log_context":["UVM_INFO @   7133881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"clkmgr_tl_intg_err","qual_name":"0.clkmgr_tl_intg_err.81712075620112925827870925813035406321090210189873133195907702147951530085136","seed":81712075620112925827870925813035406321090210189873133195907702147951530085136,"line":84,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_tl_intg_err/latest/run.log","log_context":["UVM_INFO @   8490383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: * Wrote clkmgr_reg_block.measure_ctrl_regwen[*]: *":[{"name":"clkmgr_csr_bit_bash","qual_name":"0.clkmgr_csr_bit_bash.48162524725528298728986390705442645354326423526454918960153044842742229563160","seed":48162524725528298728986390705442645354326423526454918960153044842742229563160,"line":81,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_csr_bit_bash/latest/run.log","log_context":["UVM_INFO @ 170024129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:660) [clkmgr_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch":[{"name":"clkmgr_same_csr_outstanding","qual_name":"0.clkmgr_same_csr_outstanding.8687529467281335164569024871508671396136579305162666824472182234360673729230","seed":8687529467281335164569024871508671396136579305162666824472182234360673729230,"line":81,"log_path":"/nightly/current_run/scratch/master/clkmgr-sim-vcs/0.clkmgr_same_csr_outstanding/latest/run.log","log_context":["UVM_INFO @   9810007 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":13,"total":22,"percent":59.09090909090909}