| V1 |
smoke |
aon_timer_smoke |
1.660s |
651.999us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.660s |
1.178ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.540s |
418.788us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.150s |
11.879ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.730s |
568.081us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.680s |
457.914us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.540s |
418.788us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.730s |
568.081us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.480s |
378.538us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.510s |
377.205us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
8.810s |
28.733ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.720s |
661.165us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
40.370s |
143.806ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.430s |
382.246us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.800s |
766.958us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.800s |
766.958us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.660s |
1.178ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.540s |
418.788us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.730s |
568.081us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.180s |
2.552ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.660s |
1.178ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.540s |
418.788us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.730s |
568.081us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.180s |
2.552ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
4.590s |
7.354ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
5.980s |
8.015ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
5.980s |
8.015ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
20.480s |
13.489ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
1.620s |
387.580us |
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
18 |
18 |
100.00 |