I2C Simulation Results

Thursday April 03 2025 20:30:03 UTC

GitHub Revision: `4320791`

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	31.870s	4.415ms	1	1	100.00
V1	target_smoke	i2c_target_smoke	12.660s	4.594ms	1	1	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.650s	72.455us	1	1	100.00
V1	csr_rw	i2c_csr_rw	1.660s	18.451us	1	1	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	4.000s	113.374us	1	1	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.000s	103.066us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.880s	60.161us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.660s	18.451us	1	1	100.00
		i2c_csr_aliasing	2.000s	103.066us	1	1	100.00
V1		TOTAL			7	7	100.00
V2	host_error_intr	i2c_host_error_intr	2.840s	136.040us	1	1	100.00
V2	host_stress_all	i2c_host_stress_all	12.452m	93.246ms	0	1	0.00
V2	host_maxperf	i2c_host_perf	25.490s	14.614ms	1	1	100.00
V2	host_override	i2c_host_override	1.370s	19.588us	1	1	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	1.558m	2.639ms	1	1	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	36.060s	1.936ms	1	1	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.700s	105.005us	1	1	100.00
		i2c_host_fifo_fmt_empty	13.050s	403.598us	1	1	100.00
		i2c_host_fifo_reset_rx	6.280s	170.360us	1	1	100.00
V2	host_fifo_full	i2c_host_fifo_full	2.369m	4.404ms	1	1	100.00
V2	host_timeout	i2c_host_stretch_timeout	6.770s	573.894us	1	1	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	2.980s	91.573us	0	1	0.00
V2	target_glitch	i2c_target_glitch	6.570s	1.912ms	1	1	100.00
V2	target_stress_all	i2c_target_stress_all	1.025m	249.431ms	1	1	100.00
V2	target_maxperf	i2c_target_perf	3.680s	2.667ms	1	1	100.00
V2	target_fifo_empty	i2c_target_stress_rd	15.530s	8.137ms	1	1	100.00
		i2c_target_intr_smoke	4.720s	864.940us	1	1	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	1.670s	175.834us	1	1	100.00
		i2c_target_fifo_reset_tx	1.700s	163.826us	1	1	100.00
V2	target_fifo_full	i2c_target_stress_wr	28.520s	20.881ms	1	1	100.00
		i2c_target_stress_rd	15.530s	8.137ms	1	1	100.00
		i2c_target_intr_stress_wr	21.740s	13.812ms	1	1	100.00
V2	target_timeout	i2c_target_timeout	5.060s	2.675ms	1	1	100.00
V2	target_clock_stretch	i2c_target_stretch	4.710s	1.676ms	1	1	100.00
V2	bad_address	i2c_target_bad_addr	3.650s	3.554ms	1	1	100.00
V2	target_mode_glitch	i2c_target_hrst	5.130s	11.355ms	0	1	0.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	2.350s	1.112ms	1	1	100.00
		i2c_target_fifo_watermarks_tx	2.120s	497.689us	1	1	100.00
V2	host_mode_config_perf	i2c_host_perf	25.490s	14.614ms	1	1	100.00
		i2c_host_perf_precise	2.270s	151.086us	1	1	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	6.770s	573.894us	1	1	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	2.040s	57.954us	1	1	100.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	2.710s	3.985ms	1	1	100.00
		i2c_target_nack_acqfull_addr	2.650s	2.063ms	1	1	100.00
		i2c_target_nack_txstretch	1.920s	519.080us	1	1	100.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	4.170s	362.453us	1	1	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	2.640s	2.383ms	1	1	100.00
V2	alert_test	i2c_alert_test	1.640s	37.558us	1	1	100.00
V2	intr_test	i2c_intr_test	1.680s	32.962us	1	1	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.210s	58.784us	1	1	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.210s	58.784us	1	1	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.650s	72.455us	1	1	100.00
		i2c_csr_rw	1.660s	18.451us	1	1	100.00
		i2c_csr_aliasing	2.000s	103.066us	1	1	100.00
		i2c_same_csr_outstanding	1.910s	152.108us	1	1	100.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.650s	72.455us	1	1	100.00
		i2c_csr_rw	1.660s	18.451us	1	1	100.00
		i2c_csr_aliasing	2.000s	103.066us	1	1	100.00
		i2c_same_csr_outstanding	1.910s	152.108us	1	1	100.00
V2		TOTAL			35	38	92.11
V2S	tl_intg_err	i2c_tl_intg_err	2.570s	101.241us	1	1	100.00
		i2c_sec_cm	1.620s	124.588us	1	1	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.570s	101.241us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	27.840s	1.589ms	0	1	0.00
V3	target_error_intr	i2c_target_unexp_stop	2.560s	798.681us	0	1	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	5.080s	2.104ms	0	1	0.00
V3		TOTAL			0	3	0.00
		TOTAL			44	50	88.00

Failure Buckets

UVM_ERROR (cip_base_vseq.sv:907) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 2 failures:
- Test i2c_host_stress_all_with_rand_reset has 1 failures.
  - 0.i2c_host_stress_all_with_rand_reset.103714352883984561581375666755493443810655858319962426206294688582762506999332
    Line 87, in log /nightly/runs/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 1588520504 ps: (cip_base_vseq.sv:907) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1588520504 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
- Test i2c_target_stress_all_with_rand_reset has 1 failures.
  - 0.i2c_target_stress_all_with_rand_reset.11639326261662155951879515445582375345329319610985069159857655093001806613037
    Line 80, in log /nightly/runs/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 2103565183 ps: (cip_base_vseq.sv:907) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10001 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 2103565183 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:

Test i2c_host_stress_all has 1 failures.

0.i2c_host_stress_all.2418905990892795680861263404487854201624453231122739773704163967676878688988
Line 141, in log /nightly/runs/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 93246266444 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @4902122

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 1 failures:
- Test i2c_target_unexp_stop has 1 failures.
  - 0.i2c_target_unexp_stop.60072341462739206993216948574449934180009932582299857147832648407410776860496
    Line 73, in log /nightly/runs/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 798680821 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 104 [0x68])
  UVM_INFO @ 798680821 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 1 failures:
- Test i2c_target_hrst has 1 failures.
  - 0.i2c_target_hrst.101010681121465737910545992391779712694057803125385066251744182552895490456175
    Line 74, in log /nightly/runs/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 11354783515 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 11354783515 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 1 failures:

Test i2c_host_mode_toggle has 1 failures.

0.i2c_host_mode_toggle.41426568114843554264680629193862410874445958916905994752860841009537077997767
Line 80, in log /nightly/runs/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  91572583 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @63319