| V1 |
smoke |
kmac_smoke |
35.520s |
5.082ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.790s |
68.485us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.740s |
67.854us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.200s |
635.045us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.730s |
741.856us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.800s |
140.676us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.740s |
67.854us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.730s |
741.856us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.530s |
15.453us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.940s |
49.354us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
37.221m |
552.933ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
5.322m |
4.163ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
30.380s |
1.611ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
33.910s |
9.076ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
17.712m |
97.454ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
16.987m |
32.380ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
3.345m |
19.210ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.647m |
5.204ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
3.480s |
162.813us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
3.370s |
100.287us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
5.450m |
69.436ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.220m |
37.483ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.210m |
23.321ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
13.780s |
340.496us |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.909m |
6.605ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
9.870s |
1.247ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
2.970s |
69.523us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.800s |
40.548us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.850s |
71.864us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
49.900s |
12.028ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.970s |
56.430us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
9.200m |
27.301ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.540s |
35.031us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.680s |
18.154us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.360s |
74.484us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.360s |
74.484us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.790s |
68.485us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.740s |
67.854us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.730s |
741.856us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.790s |
226.851us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.790s |
68.485us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.740s |
67.854us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.730s |
741.856us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.790s |
226.851us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.140s |
43.189us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.140s |
43.189us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.140s |
43.189us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.140s |
43.189us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
4.070s |
376.250us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
25.480s |
9.226ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
4.020s |
776.271us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
4.020s |
776.271us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.970s |
56.430us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
35.520s |
5.082ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
5.450m |
69.436ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.140s |
43.189us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
25.480s |
9.226ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
25.480s |
9.226ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
25.480s |
9.226ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
35.520s |
5.082ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.970s |
56.430us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
25.480s |
9.226ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
34.000s |
3.639ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
35.520s |
5.082ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.526m |
8.224ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |