856cba6| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | entropy_src_smoke | 5.000s | 38.297us | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | entropy_src_csr_hw_reset | 4.000s | 107.142us | 1 | 1 | 100.00 |
| V1 | csr_rw | entropy_src_csr_rw | 5.000s | 90.048us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | entropy_src_csr_bit_bash | 12.000s | 1.381ms | 1 | 1 | 100.00 |
| V1 | csr_aliasing | entropy_src_csr_aliasing | 6.000s | 78.671us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | entropy_src_csr_mem_rw_with_rand_reset | 5.000s | 66.676us | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | entropy_src_csr_rw | 5.000s | 90.048us | 1 | 1 | 100.00 |
| entropy_src_csr_aliasing | 6.000s | 78.671us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 6 | 6 | 100.00 | |||
| V2 | firmware | entropy_src_smoke | 5.000s | 38.297us | 1 | 1 | 100.00 |
| entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 | ||
| entropy_src_fw_ov | 39.000s | 7.100ms | 1 | 1 | 100.00 | ||
| V2 | firmware_mode | entropy_src_fw_ov | 39.000s | 7.100ms | 1 | 1 | 100.00 |
| V2 | rng_mode | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| V2 | rng_max_rate | entropy_src_rng_max_rate | 4.000s | 18.458us | 0 | 1 | 0.00 |
| V2 | health_checks | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| V2 | conditioning | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| V2 | interrupts | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| entropy_src_intr | 7.000s | 374.252us | 1 | 1 | 100.00 | ||
| V2 | alerts | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| entropy_src_functional_alerts | 5.000s | 807.513us | 1 | 1 | 100.00 | ||
| V2 | stress_all | entropy_src_stress_all | 1.067m | 14.597ms | 1 | 1 | 100.00 |
| V2 | functional_errors | entropy_src_functional_errors | 6.000s | 247.082us | 1 | 1 | 100.00 |
| V2 | firmware_ov_read_contiguous_data | entropy_src_fw_ov_contiguous | 12.000s | 654.735us | 1 | 1 | 100.00 |
| V2 | intr_test | entropy_src_intr_test | 4.000s | 37.532us | 1 | 1 | 100.00 |
| V2 | alert_test | entropy_src_alert_test | 5.000s | 30.911us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | entropy_src_tl_errors | 8.000s | 155.972us | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | entropy_src_tl_errors | 8.000s | 155.972us | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | entropy_src_csr_hw_reset | 4.000s | 107.142us | 1 | 1 | 100.00 |
| entropy_src_csr_rw | 5.000s | 90.048us | 1 | 1 | 100.00 | ||
| entropy_src_csr_aliasing | 6.000s | 78.671us | 1 | 1 | 100.00 | ||
| entropy_src_same_csr_outstanding | 5.000s | 168.730us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | entropy_src_csr_hw_reset | 4.000s | 107.142us | 1 | 1 | 100.00 |
| entropy_src_csr_rw | 5.000s | 90.048us | 1 | 1 | 100.00 | ||
| entropy_src_csr_aliasing | 6.000s | 78.671us | 1 | 1 | 100.00 | ||
| entropy_src_same_csr_outstanding | 5.000s | 168.730us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 10 | 12 | 83.33 | |||
| V2S | tl_intg_err | entropy_src_sec_cm | 5.000s | 323.759us | 1 | 1 | 100.00 |
| entropy_src_tl_intg_err | 5.000s | 309.886us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_config_regwen | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| entropy_src_cfg_regwen | 5.000s | 69.510us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_config_mubi | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| V2S | sec_cm_config_redun | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| V2S | sec_cm_intersig_mubi | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| entropy_src_fw_ov | 39.000s | 7.100ms | 1 | 1 | 100.00 | ||
| V2S | sec_cm_main_sm_fsm_sparse | entropy_src_functional_errors | 6.000s | 247.082us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 323.759us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ack_sm_fsm_sparse | entropy_src_functional_errors | 6.000s | 247.082us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 323.759us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_rng_bkgn_chk | entropy_src_rng | 4.000s | 65.577us | 0 | 1 | 0.00 |
| V2S | sec_cm_fifo_ctr_redun | entropy_src_functional_errors | 6.000s | 247.082us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 323.759us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ctr_redun | entropy_src_functional_errors | 6.000s | 247.082us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 323.759us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ctr_local_esc | entropy_src_functional_errors | 6.000s | 247.082us | 1 | 1 | 100.00 |
| V2S | sec_cm_esfinal_rdata_bus_consistency | entropy_src_functional_alerts | 5.000s | 807.513us | 1 | 1 | 100.00 |
| V2S | sec_cm_tile_link_bus_integrity | entropy_src_tl_intg_err | 5.000s | 309.886us | 1 | 1 | 100.00 |
| V2S | TOTAL | 3 | 3 | 100.00 | |||
| V3 | external_health_tests | entropy_src_rng_with_xht_rsps | 15.000s | 726.164us | 0 | 1 | 0.00 |
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| TOTAL | 19 | 22 | 86.36 |
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/src/lowrisc_fpv_entropy_src_csr_assert_*/entropy_src_csr_assert_fpv.sv,314): Assertion fw_ov_control_rd_A has failed has 1 failures:
0.entropy_src_rng.3509033769344061798763110719434803639516322972975375689064868903842491209673
Line 155, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/src/lowrisc_fpv_entropy_src_csr_assert_0/entropy_src_csr_assert_fpv.sv,314): (time 65577142 PS) Assertion tb.dut.entropy_src_csr_assert.fw_ov_control_rd_A has failed
UVM_ERROR @ 65577142 ps: (entropy_src_csr_assert_fpv.sv:314) [ASSERT FAILED] fw_ov_control_rd_A
UVM_INFO @ 65577142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/src/lowrisc_fpv_entropy_src_csr_assert_*/entropy_src_csr_assert_fpv.sv,299): Assertion entropy_control_rd_A has failed has 1 failures:
0.entropy_src_rng_max_rate.60728501388987758079844076676427232040171572176790061510822347024883012048551
Line 203, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng_max_rate/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/src/lowrisc_fpv_entropy_src_csr_assert_0/entropy_src_csr_assert_fpv.sv,299): (time 18457871 PS) Assertion tb.dut.entropy_src_csr_assert.entropy_control_rd_A has failed
UVM_ERROR @ 18457871 ps: (entropy_src_csr_assert_fpv.sv:299) [ASSERT FAILED] entropy_control_rd_A
UVM_INFO @ 18457871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_scoreboard.sv:2073) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.recov_alert_sts has 1 failures:
0.entropy_src_rng_with_xht_rsps.52063170252444607901951759723986974440362417818395199277926943144956510991293
Line 514, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng_with_xht_rsps/latest/run.log
UVM_ERROR @ 726164101 ps: (entropy_src_scoreboard.sv:2073) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 131072 [0x20000]) reg name: entropy_src_reg_block.recov_alert_sts
UVM_INFO @ 726164101 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---