| V1 |
smoke |
aon_timer_smoke |
2.180s |
637.671us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.860s |
918.795us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.880s |
333.058us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
25.490s |
13.805ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.420s |
632.458us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.880s |
475.843us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.880s |
333.058us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.420s |
632.458us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.910s |
420.504us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.110s |
425.655us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
19.140s |
32.522ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.500s |
591.487us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
18.370s |
14.055ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.520s |
542.117us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.630s |
370.108us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.630s |
370.108us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.860s |
918.795us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.880s |
333.058us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.420s |
632.458us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.930s |
902.847us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.860s |
918.795us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.880s |
333.058us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.420s |
632.458us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.930s |
902.847us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
10.710s |
8.084ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
6.810s |
8.122ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
6.810s |
8.122ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
2.240s |
692.141us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.670s |
487.333us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
3.310s |
4.150ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.390s |
761.619us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
11.530s |
4.038ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
21.920s |
44.391ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
1.980s |
293.571us |
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |