| V1 |
smoke |
aon_timer_smoke |
1.900s |
742.332us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.610s |
823.564us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.850s |
455.700us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
10.690s |
12.922ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.080s |
614.080us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.590s |
420.346us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.850s |
455.700us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.080s |
614.080us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.800s |
335.872us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.580s |
468.095us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
16.030s |
41.574ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.250s |
598.731us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
3.340s |
3.428ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.730s |
508.740us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.620s |
398.922us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.180s |
511.513us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.180s |
511.513us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.610s |
823.564us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.850s |
455.700us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.080s |
614.080us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.710s |
866.941us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.610s |
823.564us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.850s |
455.700us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.080s |
614.080us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.710s |
866.941us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
6.410s |
4.605ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
3.600s |
8.523ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
3.600s |
8.523ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.730s |
602.154us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.940s |
680.766us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
6.880s |
3.436ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.760s |
706.239us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
15.470s |
4.317ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
14.460s |
4.225ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |