PATTGEN Simulation Results

Monday May 05 2025 18:41:16 UTC

GitHub Revision: 1a62881

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	pattgen_smoke	8.000s	753.653us	1	1	100.00
V1	csr_hw_reset	pattgen_csr_hw_reset	11.000s	35.175us	1	1	100.00
V1	csr_rw	pattgen_csr_rw	11.000s	95.509us	1	1	100.00
V1	csr_bit_bash	pattgen_csr_bit_bash	11.000s	104.801us	1	1	100.00
V1	csr_aliasing	pattgen_csr_aliasing	9.000s	20.273us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	pattgen_csr_mem_rw_with_rand_reset	4.000s	29.599us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	pattgen_csr_rw	11.000s	95.509us	1	1	100.00
		pattgen_csr_aliasing	9.000s	20.273us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	perf	pattgen_perf	32.583m	600.000ms	0	1	0.00
V2	cnt_rollover	cnt_rollover	43.000s	1.645ms	1	1	100.00
V2	error	pattgen_error	3.000s	101.176us	1	1	100.00
V2	stress_all	pattgen_stress_all	5.000s	770.111us	0	1	0.00
V2	alert_test	pattgen_alert_test	3.000s	15.165us	1	1	100.00
V2	intr_test	pattgen_intr_test	12.000s	42.557us	1	1	100.00
V2	tl_d_oob_addr_access	pattgen_tl_errors	14.000s	153.743us	1	1	100.00
V2	tl_d_illegal_access	pattgen_tl_errors	14.000s	153.743us	1	1	100.00
V2	tl_d_outstanding_access	pattgen_csr_hw_reset	11.000s	35.175us	1	1	100.00
		pattgen_csr_rw	11.000s	95.509us	1	1	100.00
		pattgen_csr_aliasing	9.000s	20.273us	1	1	100.00
		pattgen_same_csr_outstanding	4.000s	14.744us	1	1	100.00
V2	tl_d_partial_access	pattgen_csr_hw_reset	11.000s	35.175us	1	1	100.00
		pattgen_csr_rw	11.000s	95.509us	1	1	100.00
		pattgen_csr_aliasing	9.000s	20.273us	1	1	100.00
		pattgen_same_csr_outstanding	4.000s	14.744us	1	1	100.00
V2		TOTAL			6	8	75.00
V2S	tl_intg_err	pattgen_tl_intg_err	14.000s	148.428us	1	1	100.00
		pattgen_sec_cm	4.000s	236.051us	1	1	100.00
V2S	sec_cm_bus_integrity	pattgen_tl_intg_err	14.000s	148.428us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	stress_all_with_rand_reset	pattgen_stress_all_with_rand_reset	10.000s	3.708ms	1	1	100.00
V3		TOTAL			1	1	100.00
	Unmapped tests	pattgen_inactive_level	36.000s	10.066ms	0	1	0.00
		TOTAL			15	18	83.33

Failure Buckets

• UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:

  • Test pattgen_perf has 1 failures.

    • 0.pattgen_perf.5889674637746894091161064266384492413527377547770364034606760059395552641889
      Line 96, in log /nightly/runs/scratch/master/pattgen-sim-xcelium/0.pattgen_perf/latest/run.log

        UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
        UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_FATAL (csr_utils_pkg.sv:627) [csr_utils::csr_spinwait] timeout pattgen_reg_block.ctrl.enable_ch* (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=15) has 1 failures:

  • Test pattgen_inactive_level has 1 failures.

    • 0.pattgen_inactive_level.37320062050969543022817892624523141001887758536852666395174710005666842930718
      Line 96, in log /nightly/runs/scratch/master/pattgen-sim-xcelium/0.pattgen_inactive_level/latest/run.log

        UVM_FATAL @ 10065655646 ps: (csr_utils_pkg.sv:627) [csr_utils::csr_spinwait] timeout pattgen_reg_block.ctrl.enable_ch0 (addr=0xc12935d0, Comparison=CompareOpEq, exp_data=0x0, call_count=15)
        UVM_INFO @ 10065655646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (pattgen_scoreboard.sv:76) [scoreboard] exp_item_q[i] item uncompared: has 1 failures:

  • Test pattgen_stress_all has 1 failures.

    • 0.pattgen_stress_all.43176551174340996492893529583602271480996016025864743199972416965653173349289
      Line 159, in log /nightly/runs/scratch/master/pattgen-sim-xcelium/0.pattgen_stress_all/latest/run.log

        UVM_ERROR @ 770111224 ps: (pattgen_scoreboard.sv:76) [uvm_test_top.env.scoreboard] exp_item_q[i] item uncompared:
        ------------------------------------
        Name      Type          Size  Value
        ------------------------------------
        exp_item  pattgen_item  -     @10132