| V1 |
smoke |
aon_timer_smoke |
2.040s |
641.353us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.590s |
801.245us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.160s |
407.674us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.870s |
7.544ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.240s |
636.144us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.780s |
303.343us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.160s |
407.674us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.240s |
636.144us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.690s |
383.065us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.020s |
456.102us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
2.630s |
670.262us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.820s |
708.624us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.171m |
126.734ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.850s |
442.898us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.660s |
317.579us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.950s |
408.140us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.950s |
408.140us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.590s |
801.245us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.160s |
407.674us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.240s |
636.144us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.930s |
2.582ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.590s |
801.245us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.160s |
407.674us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.240s |
636.144us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.930s |
2.582ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.000s |
4.307ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
4.650s |
8.252ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
4.650s |
8.252ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.770s |
578.123us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.690s |
714.038us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
1.880s |
3.367ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.010s |
634.681us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
3.600s |
4.227ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
11.590s |
6.147ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |