608ba69| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | pattgen_smoke | 3.000s | 28.929us | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | pattgen_csr_hw_reset | 4.000s | 55.987us | 1 | 1 | 100.00 |
| V1 | csr_rw | pattgen_csr_rw | 3.000s | 37.556us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | pattgen_csr_bit_bash | 6.000s | 579.493us | 1 | 1 | 100.00 |
| V1 | csr_aliasing | pattgen_csr_aliasing | 4.000s | 30.175us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | pattgen_csr_mem_rw_with_rand_reset | 4.000s | 257.412us | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | pattgen_csr_rw | 3.000s | 37.556us | 1 | 1 | 100.00 |
| pattgen_csr_aliasing | 4.000s | 30.175us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 6 | 6 | 100.00 | |||
| V2 | perf | pattgen_perf | 32.650m | 600.000ms | 0 | 1 | 0.00 |
| V2 | cnt_rollover | cnt_rollover | 11.000s | 2.340ms | 1 | 1 | 100.00 |
| V2 | error | pattgen_error | 4.000s | 129.036us | 1 | 1 | 100.00 |
| V2 | stress_all | pattgen_stress_all | 14.000s | 2.982ms | 0 | 1 | 0.00 |
| V2 | alert_test | pattgen_alert_test | 3.000s | 36.820us | 1 | 1 | 100.00 |
| V2 | intr_test | pattgen_intr_test | 4.000s | 40.708us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | pattgen_tl_errors | 5.000s | 746.887us | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | pattgen_tl_errors | 5.000s | 746.887us | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | pattgen_csr_hw_reset | 4.000s | 55.987us | 1 | 1 | 100.00 |
| pattgen_csr_rw | 3.000s | 37.556us | 1 | 1 | 100.00 | ||
| pattgen_csr_aliasing | 4.000s | 30.175us | 1 | 1 | 100.00 | ||
| pattgen_same_csr_outstanding | 4.000s | 32.972us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | pattgen_csr_hw_reset | 4.000s | 55.987us | 1 | 1 | 100.00 |
| pattgen_csr_rw | 3.000s | 37.556us | 1 | 1 | 100.00 | ||
| pattgen_csr_aliasing | 4.000s | 30.175us | 1 | 1 | 100.00 | ||
| pattgen_same_csr_outstanding | 4.000s | 32.972us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 6 | 8 | 75.00 | |||
| V2S | tl_intg_err | pattgen_tl_intg_err | 4.000s | 190.565us | 1 | 1 | 100.00 |
| pattgen_sec_cm | 4.000s | 45.385us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_bus_integrity | pattgen_tl_intg_err | 4.000s | 190.565us | 1 | 1 | 100.00 |
| V2S | TOTAL | 2 | 2 | 100.00 | |||
| V3 | stress_all_with_rand_reset | pattgen_stress_all_with_rand_reset | 22.000s | 3.822ms | 1 | 1 | 100.00 |
| V3 | TOTAL | 1 | 1 | 100.00 | |||
| Unmapped tests | pattgen_inactive_level | 3.767m | 10.029ms | 0 | 1 | 0.00 | |
| TOTAL | 15 | 18 | 83.33 |
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:
0.pattgen_perf.61404048380425476710924432430217073561365969921914203738324376824698322822201
Line 96, in log /nightly/runs/scratch/master/pattgen-sim-xcelium/0.pattgen_perf/latest/run.log
UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:627) [csr_utils::csr_spinwait] timeout pattgen_reg_block.ctrl.enable_ch* (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=19) has 1 failures:
0.pattgen_inactive_level.17642158822763056511557286405765553956730544282630133575674512029542791391080
Line 96, in log /nightly/runs/scratch/master/pattgen-sim-xcelium/0.pattgen_inactive_level/latest/run.log
UVM_FATAL @ 10029495779 ps: (csr_utils_pkg.sv:627) [csr_utils::csr_spinwait] timeout pattgen_reg_block.ctrl.enable_ch0 (addr=0x1b1ed910, Comparison=CompareOpEq, exp_data=0x0, call_count=19)
UVM_INFO @ 10029495779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (pattgen_scoreboard.sv:76) [scoreboard] exp_item_q[i] item uncompared: has 1 failures:
0.pattgen_stress_all.113494661386307672164170261938251877600876620329324051501356497861940667523763
Line 139, in log /nightly/runs/scratch/master/pattgen-sim-xcelium/0.pattgen_stress_all/latest/run.log
UVM_ERROR @ 2982286593 ps: (pattgen_scoreboard.sv:76) [uvm_test_top.env.scoreboard] exp_item_q[i] item uncompared:
-------------------------------------
Name Type Size Value
-------------------------------------
exp_item pattgen_item - @10445