| V1 |
smoke |
aon_timer_smoke |
1.960s |
679.016us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.280s |
845.799us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.680s |
476.692us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
7.430s |
14.357ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.420s |
644.363us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.830s |
367.090us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.680s |
476.692us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.420s |
644.363us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.140s |
471.761us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.990s |
381.051us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
9.710s |
35.290ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.130s |
608.307us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
5.910s |
4.478ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.770s |
483.152us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.000s |
306.053us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.970s |
610.077us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.970s |
610.077us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.280s |
845.799us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.680s |
476.692us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.420s |
644.363us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.760s |
1.224ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.280s |
845.799us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.680s |
476.692us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.420s |
644.363us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.760s |
1.224ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
6.830s |
4.179ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
13.650s |
8.826ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
13.650s |
8.826ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
2.430s |
543.426us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.810s |
702.103us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
8.790s |
3.336ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.090s |
585.038us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
4.140s |
4.172ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
17.490s |
5.680ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |