d7d3545| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | entropy_src_smoke | 4.000s | 39.501us | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | entropy_src_csr_hw_reset | 5.000s | 55.559us | 1 | 1 | 100.00 |
| V1 | csr_rw | entropy_src_csr_rw | 4.000s | 84.996us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | entropy_src_csr_bit_bash | 7.000s | 1.308ms | 1 | 1 | 100.00 |
| V1 | csr_aliasing | entropy_src_csr_aliasing | 7.000s | 241.455us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | entropy_src_csr_mem_rw_with_rand_reset | 4.000s | 175.400us | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | entropy_src_csr_rw | 4.000s | 84.996us | 1 | 1 | 100.00 |
| entropy_src_csr_aliasing | 7.000s | 241.455us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 6 | 6 | 100.00 | |||
| V2 | firmware | entropy_src_smoke | 4.000s | 39.501us | 1 | 1 | 100.00 |
| entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 | ||
| entropy_src_fw_ov | 2.633m | 19.086ms | 1 | 1 | 100.00 | ||
| V2 | firmware_mode | entropy_src_fw_ov | 2.633m | 19.086ms | 1 | 1 | 100.00 |
| V2 | rng_mode | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| V2 | rng_max_rate | entropy_src_rng_max_rate | 1.583m | 12.230ms | 0 | 1 | 0.00 |
| V2 | health_checks | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| V2 | conditioning | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| V2 | interrupts | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| entropy_src_intr | 6.000s | 45.245us | 1 | 1 | 100.00 | ||
| V2 | alerts | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| entropy_src_functional_alerts | 6.000s | 199.442us | 1 | 1 | 100.00 | ||
| V2 | stress_all | entropy_src_stress_all | 5.250m | 18.207ms | 1 | 1 | 100.00 |
| V2 | functional_errors | entropy_src_functional_errors | 5.000s | 174.202us | 1 | 1 | 100.00 |
| V2 | firmware_ov_read_contiguous_data | entropy_src_fw_ov_contiguous | 7.000s | 47.658us | 1 | 1 | 100.00 |
| V2 | intr_test | entropy_src_intr_test | 5.000s | 76.489us | 1 | 1 | 100.00 |
| V2 | alert_test | entropy_src_alert_test | 5.000s | 29.442us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | entropy_src_tl_errors | 5.000s | 39.304us | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | entropy_src_tl_errors | 5.000s | 39.304us | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | entropy_src_csr_hw_reset | 5.000s | 55.559us | 1 | 1 | 100.00 |
| entropy_src_csr_rw | 4.000s | 84.996us | 1 | 1 | 100.00 | ||
| entropy_src_csr_aliasing | 7.000s | 241.455us | 1 | 1 | 100.00 | ||
| entropy_src_same_csr_outstanding | 4.000s | 161.754us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | entropy_src_csr_hw_reset | 5.000s | 55.559us | 1 | 1 | 100.00 |
| entropy_src_csr_rw | 4.000s | 84.996us | 1 | 1 | 100.00 | ||
| entropy_src_csr_aliasing | 7.000s | 241.455us | 1 | 1 | 100.00 | ||
| entropy_src_same_csr_outstanding | 4.000s | 161.754us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 10 | 12 | 83.33 | |||
| V2S | tl_intg_err | entropy_src_sec_cm | 5.000s | 118.071us | 1 | 1 | 100.00 |
| entropy_src_tl_intg_err | 7.000s | 286.572us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_config_regwen | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| entropy_src_cfg_regwen | 4.000s | 21.444us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_config_mubi | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| V2S | sec_cm_config_redun | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| V2S | sec_cm_intersig_mubi | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| entropy_src_fw_ov | 2.633m | 19.086ms | 1 | 1 | 100.00 | ||
| V2S | sec_cm_main_sm_fsm_sparse | entropy_src_functional_errors | 5.000s | 174.202us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 118.071us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ack_sm_fsm_sparse | entropy_src_functional_errors | 5.000s | 174.202us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 118.071us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_rng_bkgn_chk | entropy_src_rng | 4.000s | 8.932us | 0 | 1 | 0.00 |
| V2S | sec_cm_fifo_ctr_redun | entropy_src_functional_errors | 5.000s | 174.202us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 118.071us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ctr_redun | entropy_src_functional_errors | 5.000s | 174.202us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 118.071us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ctr_local_esc | entropy_src_functional_errors | 5.000s | 174.202us | 1 | 1 | 100.00 |
| V2S | sec_cm_esfinal_rdata_bus_consistency | entropy_src_functional_alerts | 6.000s | 199.442us | 1 | 1 | 100.00 |
| V2S | sec_cm_tile_link_bus_integrity | entropy_src_tl_intg_err | 7.000s | 286.572us | 1 | 1 | 100.00 |
| V2S | TOTAL | 3 | 3 | 100.00 | |||
| V3 | external_health_tests | entropy_src_rng_with_xht_rsps | 23.000s | 1.176ms | 0 | 1 | 0.00 |
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| TOTAL | 19 | 22 | 86.36 |
UVM_ERROR (entropy_src_scoreboard.sv:2073) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.recov_alert_sts has 3 failures:
Test entropy_src_rng has 1 failures.
0.entropy_src_rng.85657175698117430551414068831347023406960636510880001840777411844557129409335
Line 155, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng/latest/run.log
UVM_ERROR @ 8931835 ps: (entropy_src_scoreboard.sv:2073) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 1 [0x1]) reg name: entropy_src_reg_block.recov_alert_sts
UVM_INFO @ 8931835 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test entropy_src_rng_max_rate has 1 failures.
0.entropy_src_rng_max_rate.16721816674126487011837792413663498228777280422556975939940992080523610160373
Line 2139, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng_max_rate/latest/run.log
UVM_ERROR @ 12229585584 ps: (entropy_src_scoreboard.sv:2073) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: entropy_src_reg_block.recov_alert_sts
UVM_INFO @ 12229585584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test entropy_src_rng_with_xht_rsps has 1 failures.
0.entropy_src_rng_with_xht_rsps.50960892531318637284953989570016310724106538725496517742763641626530010467890
Line 575, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng_with_xht_rsps/latest/run.log
UVM_ERROR @ 1176321343 ps: (entropy_src_scoreboard.sv:2073) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 131072 [0x20000]) reg name: entropy_src_reg_block.recov_alert_sts
UVM_INFO @ 1176321343 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---