SPI_HOST Simulation Results

Monday May 26 2025 18:33:00 UTC

GitHub Revision: 2214708

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_host_smoke	1.333m	7.616ms	1	1	100.00
V1	csr_hw_reset	spi_host_csr_hw_reset	3.000s	47.536us	1	1	100.00
V1	csr_rw	spi_host_csr_rw	3.000s	18.373us	1	1	100.00
V1	csr_bit_bash	spi_host_csr_bit_bash	4.000s	174.712us	1	1	100.00
V1	csr_aliasing	spi_host_csr_aliasing	3.000s	55.276us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	spi_host_csr_mem_rw_with_rand_reset	4.000s	257.087us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_host_csr_rw	3.000s	18.373us	1	1	100.00
		spi_host_csr_aliasing	3.000s	55.276us	1	1	100.00
V1	mem_walk	spi_host_mem_walk	3.000s	33.802us	1	1	100.00
V1	mem_partial_access	spi_host_mem_partial_access	4.000s	22.547us	1	1	100.00
V1		TOTAL			8	8	100.00
V2	performance	spi_host_performance	9.000s	59.147us	1	1	100.00
V2	error_event_intr	spi_host_overflow_underflow	11.000s	145.755us	1	1	100.00
		spi_host_error_cmd	10.000s	38.111us	1	1	100.00
		spi_host_event	3.500m	448.787ms	1	1	100.00
V2	clock_rate	spi_host_speed	12.000s	165.055us	1	1	100.00
V2	speed	spi_host_speed	12.000s	165.055us	1	1	100.00
V2	chip_select_timing	spi_host_speed	12.000s	165.055us	1	1	100.00
V2	sw_reset	spi_host_sw_reset	11.000s	147.133us	1	1	100.00
V2	passthrough_mode	spi_host_passthrough_mode	8.000s	47.577us	1	1	100.00
V2	cpol_cpha	spi_host_speed	12.000s	165.055us	1	1	100.00
V2	full_cycle	spi_host_speed	12.000s	165.055us	1	1	100.00
V2	duplex	spi_host_smoke	1.333m	7.616ms	1	1	100.00
V2	tx_rx_only	spi_host_smoke	1.333m	7.616ms	1	1	100.00
V2	stress_all	spi_host_stress_all	6.000s	50.478us	1	1	100.00
V2	spien	spi_host_spien	13.000s	2.155ms	1	1	100.00
V2	stall	spi_host_status_stall	24.000s	4.960ms	0	1	0.00
V2	Idlecsbactive	spi_host_idlecsbactive	7.000s	142.488us	1	1	100.00
V2	data_fifo_status	spi_host_overflow_underflow	11.000s	145.755us	1	1	100.00
V2	alert_test	spi_host_alert_test	5.000s	18.896us	1	1	100.00
V2	intr_test	spi_host_intr_test	3.000s	44.125us	1	1	100.00
V2	tl_d_oob_addr_access	spi_host_tl_errors	6.000s	51.465us	1	1	100.00
V2	tl_d_illegal_access	spi_host_tl_errors	6.000s	51.465us	1	1	100.00
V2	tl_d_outstanding_access	spi_host_csr_hw_reset	3.000s	47.536us	1	1	100.00
		spi_host_csr_rw	3.000s	18.373us	1	1	100.00
		spi_host_csr_aliasing	3.000s	55.276us	1	1	100.00
		spi_host_same_csr_outstanding	3.000s	72.604us	1	1	100.00
V2	tl_d_partial_access	spi_host_csr_hw_reset	3.000s	47.536us	1	1	100.00
		spi_host_csr_rw	3.000s	18.373us	1	1	100.00
		spi_host_csr_aliasing	3.000s	55.276us	1	1	100.00
		spi_host_same_csr_outstanding	3.000s	72.604us	1	1	100.00
V2		TOTAL			14	15	93.33
V2S	tl_intg_err	spi_host_tl_intg_err	4.000s	281.684us	1	1	100.00
		spi_host_sec_cm	6.000s	45.568us	1	1	100.00
V2S	sec_cm_bus_integrity	spi_host_tl_intg_err	4.000s	281.684us	1	1	100.00
V2S		TOTAL			2	2	100.00
	Unmapped tests	spi_host_upper_range_clkdiv	4.983m	18.539ms	1	1	100.00
		TOTAL			25	26	96.15

Failure Buckets

• xmsim: *E,ASRTST (/nightly/runs/scratch/master/spi_host-sim-xcelium/default/src/lowrisc_dv_spi_host_sva_*/spi_host_data_stable_sva.sv,104): Assertion NEGEDGE_SAME_VALUE_CHECK_P has failed has 1 failures:
  • Test spi_host_status_stall has 1 failures.

    • 0.spi_host_status_stall.38907807780640225158180348252506528496631979717109474618377975655473038318816
      Line 2318, in log /nightly/runs/scratch/master/spi_host-sim-xcelium/0.spi_host_status_stall/latest/run.log

        xmsim: *E,ASRTST (/nightly/runs/scratch/master/spi_host-sim-xcelium/default/src/lowrisc_dv_spi_host_sva_0.1/spi_host_data_stable_sva.sv,104): (time 4959989659 PS) Assertion tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1].NEGEDGE_SAME_VALUE_CHECK_P has failed
        UVM_ERROR @ 4959989659 ps: [NEGEDGE_SAME_VALUE_CHECK_P] tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1]: [i=1] - ASSERTION FAILED pos_value (0x0) != neg_value (0x0) - time=4959990000 ps
        UVM_INFO @ 4959989659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---