| V1 |
smoke |
kmac_smoke |
49.760s |
7.838ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.630s |
59.184us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.800s |
24.792us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
10.820s |
1.403ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.690s |
704.972us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.710s |
126.189us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.800s |
24.792us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.690s |
704.972us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.670s |
21.063us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.970s |
30.499us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
26.026m |
141.721ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
4.622m |
6.699ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
29.259m |
238.715ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
37.300s |
28.001ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
21.909m |
44.951ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
17.223m |
93.535ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
3.008m |
21.556ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
29.767m |
91.250ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.950s |
86.189us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.820s |
77.446us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
1.025m |
1.124ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
20.990s |
5.913ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
25.850s |
1.606ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
1.589m |
2.859ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
4.049m |
23.753ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
4.840s |
585.821us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
5.460s |
718.053us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
5.260s |
809.961us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.890s |
15.813us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
33.820s |
8.149ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
2.020s |
173.583us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
19.446m |
215.780ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.610s |
20.072us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.610s |
23.722us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.920s |
445.518us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.920s |
445.518us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.630s |
59.184us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.800s |
24.792us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.690s |
704.972us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.770s |
481.446us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.630s |
59.184us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.800s |
24.792us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.690s |
704.972us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.770s |
481.446us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.330s |
606.070us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.330s |
606.070us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.330s |
606.070us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.330s |
606.070us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
4.030s |
1.614ms |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
38.980s |
19.466ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.620s |
190.388us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.620s |
190.388us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
2.020s |
173.583us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
49.760s |
7.838ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
1.025m |
1.124ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.330s |
606.070us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
38.980s |
19.466ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
38.980s |
19.466ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
38.980s |
19.466ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
49.760s |
7.838ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
2.020s |
173.583us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
38.980s |
19.466ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
32.310s |
1.449ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
49.760s |
7.838ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
26.110s |
6.404ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |