| V1 |
smoke |
aon_timer_smoke |
1.900s |
644.752us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.330s |
1.034ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.610s |
397.547us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
4.550s |
6.365ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.770s |
483.372us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.290s |
395.888us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.610s |
397.547us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.770s |
483.372us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.790s |
434.616us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.020s |
377.392us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.940s |
593.055us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.310s |
693.936us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
19.400s |
59.903ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.640s |
492.645us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.970s |
457.437us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.520s |
479.957us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.520s |
479.957us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.330s |
1.034ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.610s |
397.547us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.770s |
483.372us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.540s |
921.716us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.330s |
1.034ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.610s |
397.547us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.770s |
483.372us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.540s |
921.716us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.870s |
7.542ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
7.460s |
4.675ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
7.460s |
4.675ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.660s |
602.272us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.630s |
544.976us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
8.890s |
3.633ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.940s |
562.666us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
5.580s |
4.125ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
36.330s |
29.143ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |