| V1 |
smoke |
aon_timer_smoke |
1.770s |
594.616us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.770s |
797.597us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.150s |
533.766us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.010s |
14.662ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.250s |
586.708us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.970s |
315.444us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.150s |
533.766us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.250s |
586.708us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.080s |
506.658us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.760s |
455.976us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
9.190s |
25.490ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.860s |
588.395us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
53.450s |
41.395ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.610s |
419.153us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.850s |
400.548us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.810s |
472.790us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.810s |
472.790us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.770s |
797.597us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.150s |
533.766us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.250s |
586.708us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.870s |
1.254ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.770s |
797.597us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.150s |
533.766us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.250s |
586.708us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.870s |
1.254ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
5.810s |
4.003ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
4.760s |
8.067ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
4.760s |
8.067ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.960s |
469.843us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.860s |
680.613us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
8.580s |
3.650ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.160s |
589.921us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
10.890s |
3.970ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
28.170s |
12.928ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |