SPI_DEVICE/1R1W Simulation Results

Thursday June 05 2025 20:26:30 UTC

GitHub Revision: 7592556

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	1.464m	35.455ms	1	1	100.00
V1	csr_hw_reset	spi_device_csr_hw_reset	1.540s	78.299us	1	1	100.00
V1	csr_rw	spi_device_csr_rw	2.250s	66.201us	1	1	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	8.830s	1.192ms	1	1	100.00
V1	csr_aliasing	spi_device_csr_aliasing	13.790s	1.182ms	1	1	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	3.720s	61.254us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	2.250s	66.201us	1	1	100.00
		spi_device_csr_aliasing	13.790s	1.182ms	1	1	100.00
V1	mem_walk	spi_device_mem_walk	1.510s	12.916us	1	1	100.00
V1	mem_partial_access	spi_device_mem_partial_access	1.840s	108.735us	1	1	100.00
V1		TOTAL			8	8	100.00
V2	csb_read	spi_device_csb_read	1.630s	32.834us	1	1	100.00
V2	mem_parity	spi_device_mem_parity	1.590s	4.160us	0	1	0.00
V2	mem_cfg	spi_device_ram_cfg	1.610s	4.025us	0	1	0.00
V2	tpm_read	spi_device_tpm_rw	3.610s	160.839us	1	1	100.00
V2	tpm_write	spi_device_tpm_rw	3.610s	160.839us	1	1	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	4.210s	672.498us	1	1	100.00
		spi_device_tpm_sts_read	1.580s	67.655us	1	1	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	1.800s	21.187us	1	1	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	12.300s	77.260ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	5.110s	1.406ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	5.110s	1.406ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	cmd_info_slots	spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	cmd_read_status	spi_device_intercept	4.220s	1.945ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	cmd_read_jedec	spi_device_intercept	4.220s	1.945ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	cmd_read_sfdp	spi_device_intercept	4.220s	1.945ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	cmd_fast_read	spi_device_intercept	4.220s	1.945ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	cmd_read_pipeline	spi_device_intercept	4.220s	1.945ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	flash_cmd_upload	spi_device_upload	2.550s	77.196us	1	1	100.00
V2	mailbox_command	spi_device_mailbox	24.970s	27.932ms	1	1	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	24.970s	27.932ms	1	1	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	24.970s	27.932ms	1	1	100.00
V2	cmd_read_buffer	spi_device_flash_mode	1.048m	34.064ms	1	1	100.00
		spi_device_read_buffer_direct	3.250s	309.271us	1	1	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	24.970s	27.932ms	1	1	100.00
		spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	quad_spi	spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	dual_spi	spi_device_flash_all	51.150s	11.273ms	1	1	100.00
V2	4b_3b_feature	spi_device_cfg_cmd	7.370s	955.659us	1	1	100.00
V2	write_enable_disable	spi_device_cfg_cmd	7.370s	955.659us	1	1	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	1.464m	35.455ms	1	1	100.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	10.230s	1.845ms	1	1	100.00
V2	stress_all	spi_device_stress_all	1.990s	120.791us	1	1	100.00
V2	alert_test	spi_device_alert_test	1.570s	25.593us	1	1	100.00
V2	intr_test	spi_device_intr_test	1.580s	64.427us	1	1	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	2.260s	98.266us	1	1	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	2.260s	98.266us	1	1	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	1.540s	78.299us	1	1	100.00
		spi_device_csr_rw	2.250s	66.201us	1	1	100.00
		spi_device_csr_aliasing	13.790s	1.182ms	1	1	100.00
		spi_device_same_csr_outstanding	3.250s	837.051us	1	1	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	1.540s	78.299us	1	1	100.00
		spi_device_csr_rw	2.250s	66.201us	1	1	100.00
		spi_device_csr_aliasing	13.790s	1.182ms	1	1	100.00
		spi_device_same_csr_outstanding	3.250s	837.051us	1	1	100.00
V2		TOTAL			20	22	90.91
V2S	tl_intg_err	spi_device_sec_cm	1.780s	47.261us	1	1	100.00
		spi_device_tl_intg_err	5.870s	1.257ms	1	1	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	5.870s	1.257ms	1	1	100.00
V2S		TOTAL			2	2	100.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	35.130s	49.145ms	1	1	100.00
		TOTAL			31	33	93.94

Failure Buckets

• UVM_ERROR (uvm_hdl_vcs.c:992) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*]) has 1 failures:

  • Test spi_device_mem_parity has 1 failures.

    • 0.spi_device_mem_parity.24431473590509376910258416514884398191141921422139731542424620584766856125661
      Line 71, in log /nightly/runs/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

        UVM_ERROR @   3614609 ps: (uvm_hdl_vcs.c:992) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[39])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
        UVM_ERROR @   3614609 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
        UVM_ERROR @   3614609 ps: (uvm_hdl_vcs.c:1142) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[935])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
      

• UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*]) has 1 failures:

  • Test spi_device_ram_cfg has 1 failures.

    • 0.spi_device_ram_cfg.110093567332153968853248748414323977643934589995878252947949434423022311545720
      Line 71, in log /nightly/runs/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log

        UVM_ERROR @   2029063 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xec3075 [111011000011000001110101] vs 0x0 [0])
        UVM_ERROR @   2034063 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa692b4 [101001101001001010110100] vs 0x0 [0])
        UVM_ERROR @   2078063 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x64d114 [11001001101000100010100] vs 0x0 [0])
        UVM_ERROR @   2083063 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xf42aae [111101000010101010101110] vs 0x0 [0])
        UVM_ERROR @   2133063 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa18b12 [101000011000101100010010] vs 0x0 [0])