EDN Simulation Results

Tuesday June 17 2025 18:40:16 UTC

GitHub Revision: b69339b

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	edn_smoke	1.810s	30.628us	1	1	100.00
V1	csr_hw_reset	edn_csr_hw_reset	1.730s	33.699us	1	1	100.00
V1	csr_rw	edn_csr_rw	1.540s	15.960us	1	1	100.00
V1	csr_bit_bash	edn_csr_bit_bash	4.510s	178.688us	1	1	100.00
V1	csr_aliasing	edn_csr_aliasing	2.000s	138.169us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	edn_csr_mem_rw_with_rand_reset	2.550s	44.239us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	edn_csr_rw	1.540s	15.960us	1	1	100.00
		edn_csr_aliasing	2.000s	138.169us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	firmware	edn_genbits	1.970s	147.848us	1	1	100.00
V2	csrng_commands	edn_genbits	1.970s	147.848us	1	1	100.00
V2	genbits	edn_genbits	1.970s	147.848us	1	1	100.00
V2	interrupts	edn_intr	1.810s	27.710us	1	1	100.00
V2	alerts	edn_alert	1.980s	25.164us	1	1	100.00
V2	errs	edn_err	1.960s	125.631us	1	1	100.00
V2	disable	edn_disable	1.880s	23.766us	1	1	100.00
		edn_disable_auto_req_mode	1.880s	63.428us	1	1	100.00
V2	stress_all	edn_stress_all	3.870s	708.738us	1	1	100.00
V2	intr_test	edn_intr_test	1.820s	11.604us	1	1	100.00
V2	alert_test	edn_alert_test	2.170s	18.962us	1	1	100.00
V2	tl_d_oob_addr_access	edn_tl_errors	2.720s	138.717us	1	1	100.00
V2	tl_d_illegal_access	edn_tl_errors	2.720s	138.717us	1	1	100.00
V2	tl_d_outstanding_access	edn_csr_hw_reset	1.730s	33.699us	1	1	100.00
		edn_csr_rw	1.540s	15.960us	1	1	100.00
		edn_csr_aliasing	2.000s	138.169us	1	1	100.00
		edn_same_csr_outstanding	2.820s	288.995us	1	1	100.00
V2	tl_d_partial_access	edn_csr_hw_reset	1.730s	33.699us	1	1	100.00
		edn_csr_rw	1.540s	15.960us	1	1	100.00
		edn_csr_aliasing	2.000s	138.169us	1	1	100.00
		edn_same_csr_outstanding	2.820s	288.995us	1	1	100.00
V2		TOTAL			11	11	100.00
V2S	tl_intg_err	edn_sec_cm	4.610s	238.482us	1	1	100.00
		edn_tl_intg_err	2.990s	191.527us	1	1	100.00
V2S	sec_cm_config_regwen	edn_regwen	1.650s	18.266us	1	1	100.00
V2S	sec_cm_config_mubi	edn_alert	1.980s	25.164us	1	1	100.00
V2S	sec_cm_main_sm_fsm_sparse	edn_sec_cm	4.610s	238.482us	1	1	100.00
V2S	sec_cm_ack_sm_fsm_sparse	edn_sec_cm	4.610s	238.482us	1	1	100.00
V2S	sec_cm_fifo_ctr_redun	edn_sec_cm	4.610s	238.482us	1	1	100.00
V2S	sec_cm_ctr_redun	edn_sec_cm	4.610s	238.482us	1	1	100.00
V2S	sec_cm_main_sm_ctr_local_esc	edn_alert	1.980s	25.164us	1	1	100.00
		edn_sec_cm	4.610s	238.482us	1	1	100.00
V2S	sec_cm_cs_rdata_bus_consistency	edn_alert	1.980s	25.164us	1	1	100.00
V2S	sec_cm_tile_link_bus_integrity	edn_tl_intg_err	2.990s	191.527us	1	1	100.00
V2S		TOTAL			3	3	100.00
V3	stress_all_with_rand_reset	edn_stress_all_with_rand_reset	1.219m	7.285ms	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			21	21	100.00