| V1 |
smoke |
aon_timer_smoke |
2.470s |
505.465us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.930s |
844.473us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.280s |
495.519us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
3.450s |
1.884ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.790s |
436.103us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.890s |
515.329us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.280s |
495.519us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.790s |
436.103us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.030s |
462.568us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.940s |
453.153us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.280m |
61.117ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.290s |
743.673us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
10.110s |
6.795ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.990s |
482.863us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.710s |
522.488us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.580s |
602.815us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.580s |
602.815us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.930s |
844.473us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.280s |
495.519us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.790s |
436.103us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.310s |
2.452ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.930s |
844.473us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.280s |
495.519us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.790s |
436.103us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.310s |
2.452ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
12.320s |
8.004ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
5.460s |
8.460ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
5.460s |
8.460ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.580s |
649.715us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.280s |
562.078us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
3.990s |
3.871ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.140s |
623.039us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
10.400s |
3.935ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
18.380s |
6.533ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |