RV_TIMER Simulation Results

Wednesday June 18 2025 18:31:46 UTC

GitHub Revision: 952e1dd

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 random rv_timer_random 1.420s 100.024us 1 1 100.00
V1 csr_hw_reset rv_timer_csr_hw_reset 1.480s 15.731us 1 1 100.00
V1 csr_rw rv_timer_csr_rw 1.400s 120.415us 1 1 100.00
V1 csr_bit_bash rv_timer_csr_bit_bash 2.200s 145.334us 1 1 100.00
V1 csr_aliasing rv_timer_csr_aliasing 1.590s 76.157us 1 1 100.00
V1 csr_mem_rw_with_rand_reset rv_timer_csr_mem_rw_with_rand_reset 1.550s 21.359us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr rv_timer_csr_rw 1.400s 120.415us 1 1 100.00
rv_timer_csr_aliasing 1.590s 76.157us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 random_reset rv_timer_random_reset 1.640s 13.922us 1 1 100.00
V2 disabled rv_timer_disabled 3.460s 2.002ms 1 1 100.00
V2 cfg_update_on_fly rv_timer_cfg_update_on_fly 3.573m 176.275ms 1 1 100.00
V2 no_interrupt_test rv_timer_cfg_update_on_fly 3.573m 176.275ms 1 1 100.00
V2 stress rv_timer_stress_all 3.480s 5.617ms 1 1 100.00
V2 alert_test rv_timer_alert_test 1.520s 27.486us 1 1 100.00
V2 intr_test rv_timer_intr_test 1.500s 14.167us 1 1 100.00
V2 tl_d_oob_addr_access rv_timer_tl_errors 3.300s 156.966us 1 1 100.00
V2 tl_d_illegal_access rv_timer_tl_errors 3.300s 156.966us 1 1 100.00
V2 tl_d_outstanding_access rv_timer_csr_hw_reset 1.480s 15.731us 1 1 100.00
rv_timer_csr_rw 1.400s 120.415us 1 1 100.00
rv_timer_csr_aliasing 1.590s 76.157us 1 1 100.00
rv_timer_same_csr_outstanding 1.580s 73.119us 1 1 100.00
V2 tl_d_partial_access rv_timer_csr_hw_reset 1.480s 15.731us 1 1 100.00
rv_timer_csr_rw 1.400s 120.415us 1 1 100.00
rv_timer_csr_aliasing 1.590s 76.157us 1 1 100.00
rv_timer_same_csr_outstanding 1.580s 73.119us 1 1 100.00
V2 TOTAL 8 8 100.00
V2S tl_intg_err rv_timer_sec_cm 1.760s 71.649us 1 1 100.00
rv_timer_tl_intg_err 2.280s 384.713us 1 1 100.00
V2S sec_cm_bus_integrity rv_timer_tl_intg_err 2.280s 384.713us 1 1 100.00
V2S TOTAL 2 2 100.00
V3 min_value rv_timer_min 1.430s 17.568us 1 1 100.00
V3 max_value rv_timer_max 1.400s 25.810us 1 1 100.00
V3 stress_all_with_rand_reset rv_timer_stress_all_with_rand_reset 17.950s 7.475ms 1 1 100.00
V3 TOTAL 3 3 100.00
TOTAL 19 19 100.00