1215104| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | entropy_src_smoke | 5.000s | 33.255us | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | entropy_src_csr_hw_reset | 4.000s | 53.003us | 1 | 1 | 100.00 |
| V1 | csr_rw | entropy_src_csr_rw | 4.000s | 29.431us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | entropy_src_csr_bit_bash | 11.000s | 655.144us | 1 | 1 | 100.00 |
| V1 | csr_aliasing | entropy_src_csr_aliasing | 6.000s | 316.386us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | entropy_src_csr_mem_rw_with_rand_reset | 5.000s | 77.344us | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | entropy_src_csr_rw | 4.000s | 29.431us | 1 | 1 | 100.00 |
| entropy_src_csr_aliasing | 6.000s | 316.386us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 6 | 6 | 100.00 | |||
| V2 | firmware | entropy_src_smoke | 5.000s | 33.255us | 1 | 1 | 100.00 |
| entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 | ||
| entropy_src_fw_ov | 4.000s | 9.453us | 0 | 1 | 0.00 | ||
| V2 | firmware_mode | entropy_src_fw_ov | 4.000s | 9.453us | 0 | 1 | 0.00 |
| V2 | rng_mode | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| V2 | rng_max_rate | entropy_src_rng_max_rate | 6.000s | 244.498us | 0 | 1 | 0.00 |
| V2 | health_checks | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| V2 | conditioning | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| V2 | interrupts | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| entropy_src_intr | 13.000s | 447.681us | 1 | 1 | 100.00 | ||
| V2 | alerts | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| entropy_src_functional_alerts | 4.000s | 562.472us | 1 | 1 | 100.00 | ||
| V2 | stress_all | entropy_src_stress_all | 5.000s | 59.186us | 1 | 1 | 100.00 |
| V2 | functional_errors | entropy_src_functional_errors | 5.000s | 147.892us | 1 | 1 | 100.00 |
| V2 | firmware_ov_read_contiguous_data | entropy_src_fw_ov_contiguous | 7.000s | 688.952us | 1 | 1 | 100.00 |
| V2 | intr_test | entropy_src_intr_test | 4.000s | 167.548us | 1 | 1 | 100.00 |
| V2 | alert_test | entropy_src_alert_test | 5.000s | 21.806us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | entropy_src_tl_errors | 6.000s | 408.032us | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | entropy_src_tl_errors | 6.000s | 408.032us | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | entropy_src_csr_hw_reset | 4.000s | 53.003us | 1 | 1 | 100.00 |
| entropy_src_csr_rw | 4.000s | 29.431us | 1 | 1 | 100.00 | ||
| entropy_src_csr_aliasing | 6.000s | 316.386us | 1 | 1 | 100.00 | ||
| entropy_src_same_csr_outstanding | 5.000s | 82.531us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | entropy_src_csr_hw_reset | 4.000s | 53.003us | 1 | 1 | 100.00 |
| entropy_src_csr_rw | 4.000s | 29.431us | 1 | 1 | 100.00 | ||
| entropy_src_csr_aliasing | 6.000s | 316.386us | 1 | 1 | 100.00 | ||
| entropy_src_same_csr_outstanding | 5.000s | 82.531us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 9 | 12 | 75.00 | |||
| V2S | tl_intg_err | entropy_src_sec_cm | 5.000s | 101.063us | 1 | 1 | 100.00 |
| entropy_src_tl_intg_err | 5.000s | 317.945us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_config_regwen | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| entropy_src_cfg_regwen | 4.000s | 107.615us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_config_mubi | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| V2S | sec_cm_config_redun | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| V2S | sec_cm_intersig_mubi | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| entropy_src_fw_ov | 4.000s | 9.453us | 0 | 1 | 0.00 | ||
| V2S | sec_cm_main_sm_fsm_sparse | entropy_src_functional_errors | 5.000s | 147.892us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 101.063us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ack_sm_fsm_sparse | entropy_src_functional_errors | 5.000s | 147.892us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 101.063us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_rng_bkgn_chk | entropy_src_rng | 53.000s | 11.036ms | 0 | 1 | 0.00 |
| V2S | sec_cm_fifo_ctr_redun | entropy_src_functional_errors | 5.000s | 147.892us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 101.063us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ctr_redun | entropy_src_functional_errors | 5.000s | 147.892us | 1 | 1 | 100.00 |
| entropy_src_sec_cm | 5.000s | 101.063us | 1 | 1 | 100.00 | ||
| V2S | sec_cm_ctr_local_esc | entropy_src_functional_errors | 5.000s | 147.892us | 1 | 1 | 100.00 |
| V2S | sec_cm_esfinal_rdata_bus_consistency | entropy_src_functional_alerts | 4.000s | 562.472us | 1 | 1 | 100.00 |
| V2S | sec_cm_tile_link_bus_integrity | entropy_src_tl_intg_err | 5.000s | 317.945us | 1 | 1 | 100.00 |
| V2S | TOTAL | 3 | 3 | 100.00 | |||
| V3 | external_health_tests | entropy_src_rng_with_xht_rsps | 4.000s | 40.697us | 0 | 1 | 0.00 |
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| TOTAL | 18 | 22 | 81.82 |
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/fusesoc-work/src/lowrisc_fpv_entropy_src_csr_assert_*/entropy_src_csr_assert_fpv.sv,306): Assertion conf_rd_A has failed has 2 failures:
Test entropy_src_rng_max_rate has 1 failures.
0.entropy_src_rng_max_rate.89441839529084053894278415284169945520776351455547311430476760814419717985698
Line 253, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng_max_rate/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/fusesoc-work/src/lowrisc_fpv_entropy_src_csr_assert_0/entropy_src_csr_assert_fpv.sv,306): (time 244498384 PS) Assertion tb.dut.entropy_src_csr_assert.conf_rd_A has failed
UVM_ERROR @ 244498384 ps: (entropy_src_csr_assert_fpv.sv:306) [ASSERT FAILED] conf_rd_A
UVM_INFO @ 244498384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test entropy_src_fw_ov has 1 failures.
0.entropy_src_fw_ov.4587164305698019764865227226695368076600027023001251489309023379956640701619
Line 153, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_fw_ov/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/fusesoc-work/src/lowrisc_fpv_entropy_src_csr_assert_0/entropy_src_csr_assert_fpv.sv,306): (time 9453095 PS) Assertion tb.dut.entropy_src_csr_assert.conf_rd_A has failed
UVM_ERROR @ 9453095 ps: (entropy_src_csr_assert_fpv.sv:306) [ASSERT FAILED] conf_rd_A
UVM_INFO @ 9453095 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_scoreboard.sv:2092) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.recov_alert_sts has 1 failures:
0.entropy_src_rng.100915608535459636388598196835720558556184566964712117996312887538044990211121
Line 828, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng/latest/run.log
UVM_ERROR @ 11035594876 ps: (entropy_src_scoreboard.sv:2092) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (0 [0x0] vs 8 [0x8]) reg name: entropy_src_reg_block.recov_alert_sts
UVM_INFO @ 11035594876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/fusesoc-work/src/lowrisc_fpv_entropy_src_csr_assert_*/entropy_src_csr_assert_fpv.sv,318): Assertion health_test_windows_rd_A has failed has 1 failures:
0.entropy_src_rng_with_xht_rsps.48051896244136711335879015852005958684673024395176489040061345689451847577506
Line 153, in log /nightly/runs/scratch/master/entropy_src-sim-xcelium/0.entropy_src_rng_with_xht_rsps/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/entropy_src-sim-xcelium/default/fusesoc-work/src/lowrisc_fpv_entropy_src_csr_assert_0/entropy_src_csr_assert_fpv.sv,318): (time 40696660 PS) Assertion tb.dut.entropy_src_csr_assert.health_test_windows_rd_A has failed
UVM_ERROR @ 40696660 ps: (entropy_src_csr_assert_fpv.sv:318) [ASSERT FAILED] health_test_windows_rd_A
UVM_INFO @ 40696660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---