RV_TIMER Simulation Results

Thursday June 19 2025 20:25:23 UTC

GitHub Revision: 1215104

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	random	rv_timer_random	1.520s	29.343us	1	1	100.00
V1	csr_hw_reset	rv_timer_csr_hw_reset	1.430s	18.213us	1	1	100.00
V1	csr_rw	rv_timer_csr_rw	1.420s	28.374us	1	1	100.00
V1	csr_bit_bash	rv_timer_csr_bit_bash	2.520s	122.862us	1	1	100.00
V1	csr_aliasing	rv_timer_csr_aliasing	1.430s	23.919us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	rv_timer_csr_mem_rw_with_rand_reset	1.550s	48.654us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	rv_timer_csr_rw	1.420s	28.374us	1	1	100.00
		rv_timer_csr_aliasing	1.430s	23.919us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	random_reset	rv_timer_random_reset	1.520s	106.428us	1	1	100.00
V2	disabled	rv_timer_disabled	2.080s	629.424us	1	1	100.00
V2	cfg_update_on_fly	rv_timer_cfg_update_on_fly	6.391m	1.617s	1	1	100.00
V2	no_interrupt_test	rv_timer_cfg_update_on_fly	6.391m	1.617s	1	1	100.00
V2	stress	rv_timer_stress_all	2.930s	5.084ms	1	1	100.00
V2	alert_test	rv_timer_alert_test	1.340s	64.709us	1	1	100.00
V2	intr_test	rv_timer_intr_test	1.390s	16.836us	1	1	100.00
V2	tl_d_oob_addr_access	rv_timer_tl_errors	2.690s	1.741ms	1	1	100.00
V2	tl_d_illegal_access	rv_timer_tl_errors	2.690s	1.741ms	1	1	100.00
V2	tl_d_outstanding_access	rv_timer_csr_hw_reset	1.430s	18.213us	1	1	100.00
		rv_timer_csr_rw	1.420s	28.374us	1	1	100.00
		rv_timer_csr_aliasing	1.430s	23.919us	1	1	100.00
		rv_timer_same_csr_outstanding	1.580s	70.586us	1	1	100.00
V2	tl_d_partial_access	rv_timer_csr_hw_reset	1.430s	18.213us	1	1	100.00
		rv_timer_csr_rw	1.420s	28.374us	1	1	100.00
		rv_timer_csr_aliasing	1.430s	23.919us	1	1	100.00
		rv_timer_same_csr_outstanding	1.580s	70.586us	1	1	100.00
V2		TOTAL			8	8	100.00
V2S	tl_intg_err	rv_timer_sec_cm	1.600s	48.028us	1	1	100.00
		rv_timer_tl_intg_err	1.850s	92.655us	1	1	100.00
V2S	sec_cm_bus_integrity	rv_timer_tl_intg_err	1.850s	92.655us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	min_value	rv_timer_min	1.610s	34.187us	1	1	100.00
V3	max_value	rv_timer_max	1.460s	12.643us	1	1	100.00
V3	stress_all_with_rand_reset	rv_timer_stress_all_with_rand_reset	10.360s	3.924ms	1	1	100.00
V3		TOTAL			3	3	100.00
		TOTAL			19	19	100.00