ADC_CTRL Simulation Results

Thursday August 28 2025 14:12:23 UTC

GitHub Revision: 05d0058

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	adc_ctrl_smoke	0.800s	503.245us	0	1	0.00
V1	csr_hw_reset	adc_ctrl_csr_hw_reset	0.890s	468.902us	0	1	0.00
V1	csr_rw	adc_ctrl_csr_rw	0.640s	469.865us	0	1	0.00
V1	csr_bit_bash	adc_ctrl_csr_bit_bash	0.660s	326.035us	0	1	0.00
V1	csr_aliasing	adc_ctrl_csr_aliasing	0.670s	481.708us	0	1	0.00
V1	csr_mem_rw_with_rand_reset	adc_ctrl_csr_mem_rw_with_rand_reset	0.710s	491.770us	0	1	0.00
V1	regwen_csr_and_corresponding_lockable_csr	adc_ctrl_csr_rw	0.640s	469.865us	0	1	0.00
		adc_ctrl_csr_aliasing	0.670s	481.708us	0	1	0.00
V1		TOTAL			0	6	0.00
V2	filters_polled	adc_ctrl_filters_polled	0.910s	268.235us	0	1	0.00
V2	filters_polled_fixed	adc_ctrl_filters_polled_fixed	1.110s	355.655us	0	1	0.00
V2	filters_interrupt	adc_ctrl_filters_interrupt	1.050s	348.923us	0	1	0.00
V2	filters_interrupt_fixed	adc_ctrl_filters_interrupt_fixed	0.610s	286.095us	0	1	0.00
V2	filters_wakeup	adc_ctrl_filters_wakeup	0.720s	371.188us	0	1	0.00
V2	filters_wakeup_fixed	adc_ctrl_filters_wakeup_fixed	0.630s	361.099us	0	1	0.00
V2	filters_both	adc_ctrl_filters_both	0.910s	272.829us	0	1	0.00
V2	clock_gating	adc_ctrl_clock_gating	0.710s	293.767us	0	1	0.00
V2	poweron_counter	adc_ctrl_poweron_counter	1.080s	351.803us	0	1	0.00
V2	lowpower_counter	adc_ctrl_lowpower_counter	0.930s	268.974us	0	1	0.00
V2	fsm_reset	adc_ctrl_fsm_reset	1.080s	340.086us	0	1	0.00
V2	stress_all	adc_ctrl_stress_all	1.290s	473.887us	0	1	0.00
V2	alert_test	adc_ctrl_alert_test	0.730s	281.351us	0	1	0.00
V2	intr_test	adc_ctrl_intr_test	1.260s	452.312us	0	1	0.00
V2	tl_d_oob_addr_access	adc_ctrl_tl_errors	1.270s	428.901us	0	1	0.00
V2	tl_d_illegal_access	adc_ctrl_tl_errors	1.270s	428.901us	0	1	0.00
V2	tl_d_outstanding_access	adc_ctrl_csr_hw_reset	0.890s	468.902us	0	1	0.00
		adc_ctrl_csr_rw	0.640s	469.865us	0	1	0.00
		adc_ctrl_csr_aliasing	0.670s	481.708us	0	1	0.00
		adc_ctrl_same_csr_outstanding	0.720s	401.299us	0	1	0.00
V2	tl_d_partial_access	adc_ctrl_csr_hw_reset	0.890s	468.902us	0	1	0.00
		adc_ctrl_csr_rw	0.640s	469.865us	0	1	0.00
		adc_ctrl_csr_aliasing	0.670s	481.708us	0	1	0.00
		adc_ctrl_same_csr_outstanding	0.720s	401.299us	0	1	0.00
V2		TOTAL			0	16	0.00
V2S	tl_intg_err	adc_ctrl_sec_cm	0.780s	328.093us	0	1	0.00
		adc_ctrl_tl_intg_err	0.810s	304.306us	0	1	0.00
V2S	sec_cm_bus_integrity	adc_ctrl_tl_intg_err	0.810s	304.306us	0	1	0.00
V2S		TOTAL			0	2	0.00
V3	stress_all_with_rand_reset	adc_ctrl_stress_all_with_rand_reset	1.150s	436.416us	0	1	0.00
V3		TOTAL			0	1	0.00
		TOTAL			0	25	0.00

Failure Buckets

• UVM_FATAL (cip_base_vseq.sv:123) virtual_sequencer [adc_ctrl_base_vseq] Need to override this when you extend from this class! has 25 failures:

  • Test adc_ctrl_smoke has 1 failures.

    • 0.adc_ctrl_smoke.81428690100955266802829699317992796805382029146615435688902596088535115257507
      Line 148, in log /nightly/current_run/scratch/master/adc_ctrl-sim-vcs/0.adc_ctrl_smoke/latest/run.log

        UVM_FATAL @ 503245122 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [adc_ctrl_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @ 503245122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test adc_ctrl_filters_polled has 1 failures.

    • 0.adc_ctrl_filters_polled.63909199765510212625199695297685128801036367489191971493053096658604582830011
      Line 148, in log /nightly/current_run/scratch/master/adc_ctrl-sim-vcs/0.adc_ctrl_filters_polled/latest/run.log

        UVM_FATAL @ 268235033 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [adc_ctrl_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @ 268235033 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test adc_ctrl_filters_polled_fixed has 1 failures.

    • 0.adc_ctrl_filters_polled_fixed.78302408996008208227892721173195809904075333834299523003638201792758705400735
      Line 144, in log /nightly/current_run/scratch/master/adc_ctrl-sim-vcs/0.adc_ctrl_filters_polled_fixed/latest/run.log

        UVM_FATAL @ 355654513 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [adc_ctrl_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @ 355654513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test adc_ctrl_filters_interrupt has 1 failures.

    • 0.adc_ctrl_filters_interrupt.99170166388372197172994967423819373204332759697541427653921065723304307844231
      Line 148, in log /nightly/current_run/scratch/master/adc_ctrl-sim-vcs/0.adc_ctrl_filters_interrupt/latest/run.log

        UVM_FATAL @ 348923391 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [adc_ctrl_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @ 348923391 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test adc_ctrl_filters_interrupt_fixed has 1 failures.

    • 0.adc_ctrl_filters_interrupt_fixed.23832685368207232160886710914183335569707695015685450164609045368647137764516
      Line 144, in log /nightly/current_run/scratch/master/adc_ctrl-sim-vcs/0.adc_ctrl_filters_interrupt_fixed/latest/run.log

        UVM_FATAL @ 286095058 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [adc_ctrl_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @ 286095058 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • ... and 20 more tests.