SPI_DEVICE/1R1W Simulation Results

Thursday August 28 2025 14:12:23 UTC

GitHub Revision: 05d0058

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	0.690s	2.721us	0	1	0.00
V1	csr_hw_reset	spi_device_csr_hw_reset	0.560s	896.638ns	0	1	0.00
V1	csr_rw	spi_device_csr_rw	0.570s	4.605us	0	1	0.00
V1	csr_bit_bash	spi_device_csr_bit_bash	0.580s	917.526ns	0	1	0.00
V1	csr_aliasing	spi_device_csr_aliasing	0.630s	1.028us	0	1	0.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	0.580s	2.029us	0	1	0.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	0.570s	4.605us	0	1	0.00
		spi_device_csr_aliasing	0.630s	1.028us	0	1	0.00
V1	mem_walk	spi_device_mem_walk	0.620s	749.268ns	0	1	0.00
V1	mem_partial_access	spi_device_mem_partial_access	0.570s	4.208us	0	1	0.00
V1		TOTAL			0	8	0.00
V2	csb_read	spi_device_csb_read	0.680s	1.489us	0	1	0.00
V2	mem_parity	spi_device_mem_parity	0.580s	4.329us	0	1	0.00
V2	mem_cfg	spi_device_ram_cfg	0.580s	4.156us	0	1	0.00
V2	tpm_read	spi_device_tpm_rw	0.620s	2.012us	0	1	0.00
V2	tpm_write	spi_device_tpm_rw	0.620s	2.012us	0	1	0.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	0.560s	1.347us	0	1	0.00
		spi_device_tpm_sts_read	0.560s	3.820us	0	1	0.00
V2	tpm_fully_random_case	spi_device_tpm_all	0.610s	5.408us	0	1	0.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	0.630s	1.035us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	0.620s	802.940ns	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	0.620s	802.940ns	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	cmd_info_slots	spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	cmd_read_status	spi_device_intercept	0.630s	14.733us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	cmd_read_jedec	spi_device_intercept	0.630s	14.733us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	cmd_read_sfdp	spi_device_intercept	0.630s	14.733us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	cmd_fast_read	spi_device_intercept	0.630s	14.733us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	cmd_read_pipeline	spi_device_intercept	0.630s	14.733us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	flash_cmd_upload	spi_device_upload	0.630s	1.876us	0	1	0.00
V2	mailbox_command	spi_device_mailbox	0.620s	1.068us	0	1	0.00
V2	mailbox_cross_outside_command	spi_device_mailbox	0.620s	1.068us	0	1	0.00
V2	mailbox_cross_inside_command	spi_device_mailbox	0.620s	1.068us	0	1	0.00
V2	cmd_read_buffer	spi_device_flash_mode	0.630s	781.357ns	0	1	0.00
		spi_device_read_buffer_direct	0.630s	1.197us	0	1	0.00
V2	cmd_dummy_cycle	spi_device_mailbox	0.620s	1.068us	0	1	0.00
		spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	quad_spi	spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	dual_spi	spi_device_flash_all	0.650s	1.568us	0	1	0.00
V2	4b_3b_feature	spi_device_cfg_cmd	0.640s	1.782us	0	1	0.00
V2	write_enable_disable	spi_device_cfg_cmd	0.640s	1.782us	0	1	0.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	0.690s	2.721us	0	1	0.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	0.630s	3.123us	0	1	0.00
V2	stress_all	spi_device_stress_all	0.640s	709.946ns	0	1	0.00
V2	alert_test	spi_device_alert_test	0.590s	1.290us	0	1	0.00
V2	intr_test	spi_device_intr_test	0.690s	818.035ns	0	1	0.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	0.670s	1.163us	0	1	0.00
V2	tl_d_illegal_access	spi_device_tl_errors	0.670s	1.163us	0	1	0.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	0.560s	896.638ns	0	1	0.00
		spi_device_csr_rw	0.570s	4.605us	0	1	0.00
		spi_device_csr_aliasing	0.630s	1.028us	0	1	0.00
		spi_device_same_csr_outstanding	0.590s	3.900us	0	1	0.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	0.560s	896.638ns	0	1	0.00
		spi_device_csr_rw	0.570s	4.605us	0	1	0.00
		spi_device_csr_aliasing	0.630s	1.028us	0	1	0.00
		spi_device_same_csr_outstanding	0.590s	3.900us	0	1	0.00
V2		TOTAL			0	22	0.00
V2S	tl_intg_err	spi_device_sec_cm	0.600s	2.687us	0	1	0.00
		spi_device_tl_intg_err	0.650s	1.443us	0	1	0.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	0.650s	1.443us	0	1	0.00
V2S		TOTAL			0	2	0.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	0.670s	1.095us	0	1	0.00
		TOTAL			0	33	0.00

Failure Buckets

• UVM_FATAL (cip_base_vseq.sv:123) virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class! has 33 failures:

  • Test spi_device_csb_read has 1 failures.

    • 0.spi_device_csb_read.53834386143159186805476740658965755987539398389539317097626868488586288705296
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_csb_read/latest/run.log

        UVM_FATAL @   1488789 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   1488789 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_mem_parity has 1 failures.

    • 0.spi_device_mem_parity.106919157808368146367235512868610196163991696101978152603865006315948870673459
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

        UVM_FATAL @   4328604 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   4328604 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_ram_cfg has 1 failures.

    • 0.spi_device_ram_cfg.36438459671334209904763864332305618160894179503296476014751321639252000554469
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log

        UVM_FATAL @   4155560 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   4155560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_tpm_read_hw_reg has 1 failures.

    • 0.spi_device_tpm_read_hw_reg.4283559626926733003972353672704823223038738381142067792819610907223368704371
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_tpm_read_hw_reg/latest/run.log

        UVM_FATAL @   1346635 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   1346635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_tpm_all has 1 failures.

    • 0.spi_device_tpm_all.23778746362311712789775894197613451209229179625644631921033686594925235488789
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_tpm_all/latest/run.log

        UVM_FATAL @   5408075 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   5408075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • ... and 28 more tests.